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參數(shù)資料
| 型號： | LTC3858EUH-2#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PQCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, PLASTIC, MO-220WHHD, QFN-32 |
| 文件頁數(shù)： | 17/40頁 |
| 文件大?。?/td> | 432K |
| 代理商： | LTC3858EUH-2#PBF |
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LTC3858-2
24
38582f
APPLICATIONS INFORMATION
Figure 9. Capacitive Charge Pump for EXTVCC
Topside MOSFET Driver Supply (CB, DB)
External bootstrap capacitors, CB, connected to the BOOST
pins supply the gate drive voltages for the topside MOSFETs.
Capacitor CB in the Functional Diagram is charged though
external diode DB from INTVCC when the SW pin is low.
When one of the topside MOSFETs is turned on, the driver
places the CB voltage across the gate-source of the desired
MOSFET. This enhances the top MOSFET switch and turns
it on. The switch node voltage, SW, rises to VIN and the
BOOST pin follows. With the topside MOSFET on, the
boost voltage is above the input supply: VBOOST = VIN +
VINTVCC. The value of the boost capacitor, CB, needs to be
100 times that of the total input capacitance of the top-
side MOSFET(s). The reverse breakdown of the external
Schottky diode must be greater than VIN(MAX).
When adjusting the gate drive level, the final arbiter is the
total input current for the regulator. If a change is made
and the input current decreases, then the efficiency has
improved. If there is no change in input current, then there
is no change in efficiency.
Fault Conditions: Current Limit and Current Foldback
When the output current hits the current limit, the output
voltage begins to drop. If the output voltage falls below
70% of its nominal output level, then the maximum
sense voltage is progressively lowered to about half of
its maximum selected value. Under short-circuit condi-
tions with very low duty cycles, the LTC3858-2 will begin
cycle skipping in order to limit the short-circuit current.
In this situation the bottom MOSFET will be dissipating
most of the power but less than in normal operation. The
short-circuit ripple current is determined by the minimum
on-time, tON(MIN), of the LTC3858-2 (≈95ns), the input
voltage and inductor value:
ΔIL(SC) = tON(MIN)
VIN
L
The resulting average short-circuit current is:
ISC =
50% ILIM(MAX)
RSENSE
–
1
2
ΔIL(SC)
Phase-Locked Loop and Frequency Synchronization
The LTC3858-2 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a lowpass filter,
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the top MOSFET of controller 1 to be locked to
the rising edge of an external clock signal applied to the
PLLIN/MODE pin. The turn-on of controller 2’s top MOSFET
is thus 180 degrees out of phase with the external clock.
The phase detector is an edge sensitive digital type that
provides zero degrees phase shift between the external
and internal oscillators. This type of phase detector does
not exhibit false lock to harmonics of the external clock.
When not prebiased, applying an external clock will invoke
traditional PLL operation. If the external clock frequency is
greater than the internal oscillator’s frequency, fOSC, then
current is sourced continuously from the phase detector
output, pulling up the VCO input. When the external clock
frequency is less than fOSC, current is sunk continuously,
pulling down the VCO input. If the external and internal
frequencies are the same but exhibit a phase difference,
the current sources turn on for an amount of time cor-
responding to the phase difference. The voltage at the
VCO input is adjusted until the phase and frequency of
the internal and external oscillators are identical. At the
stable operating point, the phase detector output is high
impedance and the internal filter capacitor, CLP, holds the
voltage at the VCO input.
EXTVCC
VIN
TG1
SW
BG1
PGND
1/2 LTC3858-2
RSENSE
VOUT
VN2222LL
COUT
38582 F09
MBOT
MTOP
CIN
VIN
L
D
BAT85
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