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參數(shù)資料
| 型號： | LTC3833IFE#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | 4.40 MM, LEAD FREE, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 31/36頁 |
| 文件大?。?/td> | 513K |
| 代理商： | LTC3833IFE#PBF |
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LTC3833
4
3833f
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VFB = VOSNS+ – VOSNS–, unless otherwise noted. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Gate Drivers
RTG(HI)
TG Driver Pull-Up On-Resistance
TG High
2.5
Ω
RTG(LO)
TG Driver Pull-Down On-Resistance
TG Low
1.2
Ω
RBG(HI)
BG Driver Pull-Up On-Resistance
BG High
2.5
Ω
RBG(LO)
BG Driver Pull-Down On-Resistance
BG Low
0.8
Ω
tDLY(OFF)
Top Gate Off to Bottom Gate On
Delay Time
(Note 6)
20
ns
tDLY(ON)
Bottom Gate Off to Top Gate On
Delay Time
(Note 6)
15
ns
Internal VCC Regulator and External VCC
INTVCC
Internal VCC Voltage
6V < VIN < 38V
5.1
5.3
5.55
V
INTVCC (%)
Internal VCC Load Regulation
ICC = 0mA to 50mA
–1
–2
%
EXTVCC(TH)
EXTVCC Switchover Voltage
EXTVCC Rising
4.4
4.6
4.75
V
EXTVCC(HYS) EXTVCC Switchover Hysteresis
200
mV
EXTVCC
EXTVCC Voltage Drop
VEXTVCC = 5V, ICC = 50mA
200
mV
PGOOD Output
PGDOV
PGOOD Upper Threshold
VFB Rising (with Respect to Regulated
Feedback Voltage VREG)
5
7.5
10
%
PGDUV
PGOOD Lower Threshold
VFB Falling (with Respect to Regulated
Feedback Voltage VREG)
–10
–7.5
–5
%
PGDHYS
PGOOD Hysteresis
VFB Returning
2
%
VPGD(LO)
PGOOD Low Voltage
IPGOOD = 5mA
0.15
0.4
V
tPGD(FALL)
Delay from OV/UV Fault to PGOOD Falling
20
s
tPGD(RISE)
Delay from OV/UV Recovery to PGOOD
Rising
10
s
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The junction temperature (TJ in °C) is calculated from the ambient
temperature (TA in °C) and power dissipation (PD in Watts) as follows:
TJ = TA + (PD θJA)
where
θJA (in °C/W) is the package thermal impedance provided in the Pin
Configuration section for the corresponding package.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 4: The LTC3833 is tested under pulsed loading conditions such
that TJ ≈ TA. The LTC3833E is guaranteed to meet specifications from
0°C to 85°C junction temperature; specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3833I is guaranteed to meet specifications over the full –40°C to 125°C
operating junction temperature range. Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance and other environmental factors.
Note 5: The LTC3833 is tested in a feedback loop that adjusts
VFB = VOSNS+ – VOSNS– to achieve a specified error amplifier output voltage
(on ITH pin). The specification at 85°C is not tested in production. This
specification is assured by design, characterization and correlation to
production testing at 125°C.
Note 6: Delay times are measured using 50% levels.
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