參數(shù)資料
型號: LTC3616IUDD#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 13.5 A SWITCHING REGULATOR, 2700 kHz SWITCHING FREQ-MAX, PQCC24
封裝: 3 X 5 MM, LEAD FREE, PLASTIC, QFN-24
文件頁數(shù): 10/28頁
文件大?。?/td> 490K
代理商: LTC3616IUDD#TRPBF
LTC3616
18
3616fa
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. More output
capacitance may be required depending on the duty cycle
and load step requirements.
AVP Mode
Fast load transient response, limited board space and low
cost are typical requirements of microprocessor power
supplies. A microprocessor has typical full load step with
veryfastslewrate.Thevoltageatthemicroprocessormust
be held to about ±0.1V of nominal in spite of these load
current steps. Since the control loop cannot respond this
fast, the output capacitors must supply the load current
until the control loop can respond.
Normally, several capacitors in parallel are required to
meet microprocessor transient requirements. Capacitor
ESR and ESL primarily determine the amount of droop or
overshoot in the output voltage.
ConsidertheLTC3616withoutAVPwithabankoftantalum
output capacitors. If a load step with very fast slew rate
occurs, the voltage excursion will be seen in both direc-
tions, for full load to minimum load transient and for the
minimum load to full load transient.
applicaTions inForMaTion
Figure 4. Load Step Transient Forced
Continuous Mode with AVP Mode
If the ITH pin is tied to SVIN, the active voltage positioning
(AVP) mode and internal compensation are selected.
AVP mode intentionally compromises load regulation by
reducing the gain of the feedback circuit, resulting in an
output voltage that varies with load current. When the load
current suddenly increases, the output voltage starts from
a level slightly higher than nominal so the output voltage
can droop more and stay within the specified voltage
range. When the load current suddenly decreases the
output voltage starts at a level lower than nominal so the
output voltage can have more overshoot and stay within
the specified voltage range (see Figures 3 and 4).
Thebenefitisalowerpeak-to-peakoutputvoltagedeviation
for a given load step without having to increase the output
filtercapacitance.Alternatively,theoutputvoltagefilterca-
pacitance can be reduced while maintaining the same peak
to peak transient response. Due to the reduced loop gain
in AVP mode, no external compensation is required.
DDR Mode
The LTC3616 can both source and sink current if the MODE
pin is configured to forced continuous mode.
Currentsinkingistypicallylimitedto3Afor1MHzfrequency
and a 0.47H inductor, but can be lower at higher frequen-
cies and low output voltages. If higher ripple current can
be tolerated, smaller inductor values can increase the sink
current limit. See the Typical Performance Characteristics
curves for more information.
Figure 3. Load Step Transient Forced
Continuous Mode (AVP Inactive)
VOUT
200mV/DIV
IL
1A/DIV
50s/DIV
3616 F03
VIN = 3.3V
VOUT = 1.8V
ILOAD = 100mA TO 3A
VMODE = 1.5V
COMPENSATION FIGURE 1
VOUT
100mV/DIV
IL
1A/DIV
50s/DIV
3616 F04
VIN = 3.3V
VOUT = 1.8V
ILOAD = 100mA TO 3A
VMODE = 1.5V
VITH = 3.3V
OUTPUT CAPACITOR VALUE FIGURE 1
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