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參數(shù)資料
| 型號： | LTC2442IG |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 24-Bit High Speed 4-Channel Delta-Sigma ADC with Integrated Amplifi er |
| 中文描述： | 4-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO36 |
| 封裝： | 5.30 MM, PLASTIC, SSOP-36 |
| 文件頁數(shù)： | 23/32頁 |
| 文件大小： | 392K |
| 代理商： | LTC2442IG |
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LTC2442
23
2442f
If F
O
is grounded, f
S
is set by the on-chip oscillator at
1.8MHz ±5% (over supply and temperature variations). At
an OSR of 32,768, the first NULL is at f
N
= 55Hz and the
no latency output rate is f
N
/8 = 6.9Hz. At the maximum
OSR, the noise performance of the device is 220nV
RMS
with
better than 80dB rejection of 50Hz ±2% and 60Hz ±2%.
Since the OSR is large (32,768) the wide band rejection
is extremely large and the antialiasing requirements are
simple. The first multiple of f
S
occurs at 55Hz 32,768 =
1.8MHz, see Figure 12.
The first NULL becomes f
N
= 7.03kHz with an OSR of 256
(an output rate of 879Hz) and F
O
grounded. While the NULL
has shifted, the sample rate remains constant. As a result
of constant modulator sampling rate, the linearity, offset
and full-scale performance remains unchanged as does
the first multiple of f
S
.
The sample rate f
S
and NULL f
N
, may also be adjusted by
driving the F
O
pin with an external oscillator. The sample
rate is f
S
= f
EOSC
/5, where f
EOSC
is the frequency of the
clock applied to F
O
. Combining a large OSR with a reduced
sample rate leads to notch frequencies f
N
near DC while
maintaining simple antialiasing requirements. A 100kHz
clock applied to F
O
results in a NULL at 0.6Hz plus all
harmonics up to 20kHz, see Figure 13. This is useful in
applications requiring digitalization of the DC component
of a noisy input signal and eliminates the need of placing
a 0.6Hz filter in front of the ADC.
An external oscillator operating from 100kHz to 20MHz can
be implemented using the LTC1799 (resistor set SOT-23
oscillator), see Figure 14. By floating pin 4 (DIV) of the
LTC1799, the output oscillator frequency is:
The normal mode rejection characteristic shown in
Figure 13 is achieved by applying the output of the LTC1799
(with R
SET
= 100k) to the F
O
pin on the LTC2442 with OSR
= 32,768.
f
MHz
k
R
OSC
SET
=
10
10
10
APPLICATIU
W
U
U
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
–60
–40
0
2442 F12
–80
–100
1000000
2000000
–120
1.8MHz
–140
–20
N
REJECTION > 120dB
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
–40
–20
0
8
2442 F13
–60
–80
2
4
6
10
–100
–120
–140
N
Figure 12. Normal Mode Rejection (Internal Oscillator)
Figure 13. Normal Mode Rejection (Internal Oscillator at 90kHz)
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