參數(shù)資料
型號: LTC1759
廠商: Linear Technology Corporation
英文描述: Octal D-Type Edge-Triggered Read-Back Latches 24-SOIC 0 to 70
中文描述: 智能電池充電器
文件頁數(shù): 3/28頁
文件大?。?/td> 362K
代理商: LTC1759
3
LTC1759
ELECTRICAL CHARACTERISTICS
The
G
denotes specifications which apply over the full operating temperature range (T
J
= 0
°
C to 100
°
C), otherwise specifications are
T
A
= 25
°
C. V
CC
= DCIN = 18V, V
BAT1, 2
= 12.6V, V
DD
= 3.3V unless otherwise specified.
PARAMETER
BOOST Pin Current
CONDITIONS
V
BOOST
= V
SW
+ 8V, 0V
V
SW
20V
TGATE High
TGATE Low
Measured at (V
BOOST
– V
SW
)
Low to High
Hysteresis
V
BOOSTC
= V
CC
+ 8V
11V
V
CC
24V, 0V
V
BAT
20V
R
SET
= 4.93k
R
SET
= 49.3k
V
SDB
= High
V
SDB
= Low (Shutdown)
MIN
TYP
MAX
UNITS
2
2
3
3
mA
mA
V
BOOST
Threshold to Turn T
GATE
Off
(Note 6)
G
6.8
7.1
0.25
1
7.3
V
V
BOOSTC Pin Current
Sense Amplifier CA1 Gain and Input Offset Voltage
(With R
S2
= R
S3
= 200
)
(Measured Across R
S1
) (Note 4)
CA1 Bias Current (SENSE, BAT1)
mA
G
92
7
100
10
–50
108
13
–120
–10
V
CC
– 0.3
2
10
97
3
3
2
300
1
mV
mV
μ
A
μ
A
G
CA1 Input Common Mode Range
SPIN Input Current
G
–0.25
V
V
SDB
= High, V
SPIN
= 12.6V
V
SDB
= Low
0.5mA Output Current
Output Current from 50
μ
A to 500
μ
A
0.5mA Output Current
0.5mA Output Current
V
C
= 1V, I
VC
=
±
1
μ
A
Ouput Current from 50
μ
A to 500
μ
A
G
mA
μ
A
mV
mho
μ
A
mA
μ
mho
mho
CL1 Turn-On Threshold
CL1 Transconductance
CLP Input Current
CLN Input Current
CA2 Transconductance
V
A
Transconductance (Note 5)
Gate Drivers
V
GBIAS
V
TGATE
High (V
TGAGE
– V
SW
)
V
BGATE
High
V
TGATE
Low (V
TGATE
– V
SW
)
V
BGATE
Low
INFET “ON” Clamping Voltage (V
CC
– V
INFET
)
INFET “ON” Drive Current
INFET “OFF” Clamping Voltage
INFET “OFF” Drive Current
V
TGATE
, V
BGATE
at Shutdown
Trip Points
DCDIV Threshold
DCDIV Hysteresis
DCDIV Input Bias Current
Power-Fail Indicator (V
BAT2
V
DCIN
)
(Note 7)
Power-Fail Indicator Hysteresis (V
BAT2
V
DCIN
)
SYNC Pin Threshold
SYNC Pin Input Current
87
0.5
92
1
1
0.8
200
0.6
150
0.21
V
CC
11V, I
GBIAS
15mA, V
SDB
= High
I
TGATE
20mA
I
BGATE
20mA
I
TGATE
50mA
I
BGATE
50mA
G
8.4
5.6
6.2
8.9
6.6
7.2
9.3
V
V
V
V
V
V
G
G
G
0.8
0.8
9
G
G
6.5
8
7.8
20
V
INFET
= V
CC
– 6V
V
CC
Not Connected, I
INFET
< –2
μ
A
V
CC
= 12.4V, (V
CC
– V
INFET
)
2V
V
SDB
= Low, I
TGATE
= I
BGATE
= 10
μ
A
G
mA
1.4
V
–2.5
mA
G
1
V
V
DCDIV
Rising from 0.8V to 1.2V
G
0.9
1.0
25
1.1
V
mV
nA
V/V
V/V
V
DCDIV
= 1V
AC_PRESENT = 1, V
DCIN
= 6V
AC_PRESENT = 1, V
DCIN
= 6V
G
100
0.94
G
0.84
0.89
0.02
1.4
0.9
2.0
–500
–30
V
V
SYNC
= 0V
V
SYNC
= 2V
μ
A
μ
A
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