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參數(shù)資料
| 型號(hào)： | LTC1759 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Octal D-Type Edge-Triggered Read-Back Latches 24-SOIC 0 to 70 |
| 中文描述： | 智能電池充電器 |
| 文件頁數(shù)： | 24/28頁 |
| 文件大小： | 362K |
| 代理商： | LTC1759 |
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24
LTC1759
Step 1:
Determine R
SENSE
. Using your chosen I
MAX
for
your maximum charge current, calculate the sense resis-
tor value and round to the nearest standard value. Any
rounding error is made up by the R
SET
resistor calculation.
The value of the V
SENSE
voltage is user-definable. A good
trade-off between minimize power dissipation in the cur-
rent sense resistor and maintaining good current scale
accuracy is to use V
SENSE
= 100mV for full-scale current.
R
SENSE
= V
SENSE
/I
MAX
R
SENSE
=
0.1V/4.092A = 0.024
Use R
SENSE
= 0.025
Step 2:
Determine the value of R
SET
. V
REF
is 2.465V.
Round R
SET
to the nearest standard value.
R
SET
= V
REF
/(1.25 I
MAX
) R
S1
/R
SENSE
R
SET
= 2.465/(1.25 4.092) 200/0.025 = 3.855k
Use R
SET
= 3.83k
Step 3:
Determine the value of R
ILIMIT
. This is simply a
lookup function based on your I
MAX
value. See the Electri-
cal Characteristics table for allowable R
ILIMIT
values. Refer
to Table 8 per recommended resistor values.
Inductor Selection
Higher operating frequencies allow the use of smaller
inductor and capacitor values. A higher frequency gener-
ally results in lower efficiency because of MOSFET gate
charge losses. In addition, the effect of inductor value on
ripple current and low current operation must also be
considered. The inductor ripple current
I
L
decreases
with higher frequency and increases with higher V
IN
.
I
f L
V
V
V
L
OUT
OUT
IN
=
( )( )
1
1
Accepting larger values of
I
L
allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is
I
L
= 0.4(I
MAX
). Remember the
maximum
I
L
occurs at the maximum input voltage. The
inductor value also has an effect on low current operation.
The transition to low current operation begins when the
inductor current reaches zero while the bottom MOSFET is
on. Lower inductor values (higher
I
L
) will cause this to
occur at higher load currents, which can cause a dip in
APPLICATIO
S I
N
FOR
ATIO
U
W
U
efficiency in the upper range of low current operation. In
practice 15
μ
H is the lowest value recommended for use.
Calculating IC Power Dissipation
The power dissipation of the LTC1759 is dependent upon
the gate charge of Q2 and Q3. The gate charge is deter-
mined from the manufacturer’s data sheet and is depen-
dent upon both the gate voltage swing and the drain
voltage swing of the FET.
P
D
= (V
VCC
– V
GBIAS
)[f
PWM
(Q
G2
+ Q
G3
)] + V
VCC
I
VCC
Example: V
VCC
= 18V, V
GBIAS
= 8.9V, f
PWM
= 230kHz,
Q
G2
= Q
G3
= 20nC, I
VCC
= 20mA.
P
D
= (18V – 8.9V)(230kHz 40nC) + 18V 20mA
= 437mW
Soft Start and Undervoltage Lockout
The LTC1759 is soft started by the 0.33
μ
F capacitor on the
V
C
pin. On start-up, V
C
pin voltage will rise quickly to 0.5V,
then ramp up at a rate set by the internal 45
μ
A pull-up
current and the external capacitor. Battery charging cur-
rent starts ramping up when V
C
voltage reaches 0.7V and
full current is achieved with V
C
at 1.1V. With a 0.33
μ
F
capacitor, time to reach full charge current is about 10ms
and it is assumed that input voltage to the charger will
reach full value in less than 10ms. The capacitor can be
increased up to 1
μ
F if longer input start-up times are
needed.
In any switching regulator, conventional timer-based soft
starting can be defeated if the input voltage rises much
slower than the time out period. This happens because the
switching regulators in the battery charger and the com-
puter power supply are typically supplying a fixed amount
of power to the load. If input voltage comes up slowly
compared to the soft start time, the regulators will try to
deliver full power to the load when the input voltage is still
well below its final value. If the adapter is current limited,
it cannot deliver full power at reduced output voltages and
the possibility exists for a quasi “l(fā)atch” state where the
adapter output stays in a current limited state at reduced
output voltage. For instance, if maximum charger plus
computer load power is 30W, a 15V adapter might be
current limited at 2.5A. If adapter voltage is less than
(30W/2.5A = 12V) when full power is drawn, the adapter
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