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參數(shù)資料
| 型號(hào)： | LTC1759 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Octal D-Type Edge-Triggered Read-Back Latches 24-SOIC 0 to 70 |
| 中文描述： | 智能電池充電器 |
| 文件頁數(shù)： | 22/28頁 |
| 文件大?。?/td> | 362K |
| 代理商： | LTC1759 |
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22
LTC1759
When wake-up is asserted to the current DAC block, the
delta-sigma is then fixed at a value equal to 80mA, inde-
pendent of the I
LIMIT
setting.
Note:
The external resistor connected to the I
SET
pin must be
multiplied by 0.8 to compensate for the 80% maximum
duty cycle of the sigma-delta modulator. Note also that the
80% duty cycle converts the rise/fall time mismatches to
a small gain error, rather than a nonlinearity. The parasitic
OPERATIOU
capacitance at the I
SET
pin should be minimized to keep
these errors small.
The Battery Monitor Block (PWR_FAIL)
Two internal resistor dividers compare the BAT2 terminal
to the DCIN terminal. When BAT2 is above 89% of the
voltage at DCIN the PWR_FAIL bit is set to 1. A small
amount of proportional hysteresis, ~2%, is used for noise
immunity. The PWR_FAIL bit is set low if AC_PRESENT
is low.
APPLICATIO
S I
N
FOR
ATIO
U
Adapter Limiting
An important feature of the LTC1759 is the ability to
automatically adjust charging current to a level which
avoids overloading the wall adapter. This allows the prod-
uct to operate at the same time that batteries are being
charged without complex load management algorithms.
Additionally, batteries will automatically be charged at the
maximum possible rate of which the adapter is capable.
This feature is created by sensing total adapter output
current and adjusting charging current downward if a
preset adapter current limit is exceeded. True analog
control is used, with closed loop feedback ensuring that
adapter load current remains within limits. Amplifier CL1
in Figure 9 senses the voltage across R
S4
, connected
between the CLP and CLN pins. When this voltage exceeds
92mV, the amplifier will override programmed charging
current to limit adapter current to 92mV/R
S4
. A lowpass
filter formed by 500
and 1
μ
F is required to eliminate
switching noise. If the current limit is not used, both CLP
and CLN pins should be connected to V
CC
.
W
U
Setting Input Current Limit
To set the input current limit, you need to know the
minimum wall adapter current rating. Subtract 5% for the
input current limit tolerance and use that current to deter-
mine the resistor value.
R
S4
= 92mV/I
LIMIT
I
LIMIT
=
Adapter Min Current – (Adapter Min Current 5%)
Table 7. Common R
S4
Resistor Values
ADAPTER
R
S4
VALUE*
RATING (A)
(
) 1%
1.5
1.8
2
2.3
2.5
2.7
3
* Values shown above are rounded to nearest standard value.
R
S4
POWER
DISSIPATION (W)
0.135
0.162
0.18
0.206
0.225
0.241
0.27
R
S4
POWER
RATING (W)
0.25
0.25
0.25
0.25
0.5
0.5
0.5
0.06
0.05
0.045
0.039
0.036
0.033
0.03
As is often the case, the wall adapter will usually have at
least a +10% current limit margin and many times one can
simply set the adapter current limit value to the actual
adapter rating (see Table 7).
Figure 9. Adapter Current Limiting
92mV
–
+
500
CLP
CLN
V
CC
1759 F09
LTC1759
1
μ
F
+
R
S4
*
C
IN
V
IN
CL1
AC ADAPTER
INPUT
*R
S4
=
92mV
ADAPTER CURRENT LIMIT
+
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