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參數(shù)資料
| 型號： | LTC1406 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Low Power, 8-Bit, 20Msps, Sampling A/D Converter(低功耗,12位, 20Msps,采樣模數(shù)轉(zhuǎn)換器) |
| 中文描述： | 低功耗，8位，20Msps，采樣A / D轉(zhuǎn)換器（低功耗，12位，20Msps，采樣模數(shù)轉(zhuǎn)換器） |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 367K |
| 代理商： | LTC1406 |
4
LTC1406
TW U
The
G
denotes specifications which apply over the full operating temperature range, otherwise specifications are T
A
= 25
°
C. (Note 5)
SYMBOL
f
SMPL(MAX)
t
1
t
2
t
3
t
4
t
5
t
6
PARAMETER
Maximum Sampling Frequency
Clock Period
Pulse Width High
Pulse Width Low
Output Delay
Pipeline Delay
Aperture Delay
Aperture Jitter
CONDITIONS
MIN
20
50
25
25
TYP
MAX
UNITS
MHz
G
(Notes 11, 12)
(Notes 11, 12)
(Notes 11, 12)
C
L
= 15pF
G
ns
ns
ns
ns
G
G
15
5
3
5
25
Cycles
ns
ps
RMS
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND, OGND
and AGND wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below ground or above V
DD
,
they will be clamped by internal diodes. This product can handle input
currents greater than 100mA below ground or above V
DD
without latchup.
Note 4:
When these pin voltages are taken below ground they will be
clamped by internal diodes. This product can handle input currents up to
100mA below ground without latchup. These pins are not clamped to V
DD
.
Note 5:
V
DD
= 5V, f
SMPL
= 20MHz and t
r
= t
f
= 2ns unless otherwise
specified.
Note 6:
Linearity, offset and full-scale specifications apply for a single-
ended A
IN+
input with A
IN–
tied to V
REF
= 2.5V.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8:
Bipolar offset is the offset voltage measured from –0.5LSB
when the output code flickers between 0111 1111 and 1000 0000.
Note 9:
Guaranteed by design, not subject to test.
Note 10:
Recommended operating conditions.
Note 11:
The falling CLK edge starts a conversion.
Note 12:
At the maximum conversion rate, deviation from a 50% duty
cycle results in interstage settling times <25ns and performance may
be affected.
Note 13:
V
IN
= –Full Scale.
Distortion vs Input Frequency
TYPICAL PERFOR
M
A
CE CHARACTERISTICS
U
INPUT FREQUENCY (Hz)
100k
S
52
48
44
40
36
32
28
24
20
16
12
8
4
0
1M
10M
100M
1406 G01
S/(N + D) vs Input Frequency
INPUT FREQUENCY (Hz)
100k
A
0
–10
–20
–30
–40
–50
–60
–70
–80
1M
10M
100M
1406 G03
THD
3RD HARMONIC
2ND HARMONIC
Signal-to-Noise Ratio vs
Input Frequency
INPUT FREQUENCY (Hz)
100k
S
52
48
44
40
36
32
28
24
20
16
12
8
4
0
1M
10M
100M
1406 G02
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