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參數(shù)資料
| 型號： | LTC1404 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Complete SO-8, 12-Bit, 600ksps ADC with Shutdown(SO-8封裝，12位,600ksps，模數(shù)轉(zhuǎn)換器（帶關(guān)斷）) |
| 中文描述： | 完整的SO - 8，12位，600ksps ADC的與關(guān)斷（以SO - 8封裝，12位，600ksps，模數(shù)轉(zhuǎn)換器（帶關(guān)斷）） |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 392K |
| 代理商： | LTC1404 |
13
LTC1404
APPLICATIO
S I
N
FOR
ATIO
U
LT1229/LT1230:
Dual and quad 100MHz current feedback
amplifiers.
±
2V to
±
15V supplies, 6mA supply current
each amplifier. Low noise. Good AC specs.
LT1360:
37MHz voltage feedback amplifier.
±
5V to
±
15V
supplies. 3.8mA supply current. Good AC and DC specs.
70ns settling to 0.5LSB.
LT1363:
50MHz, 450V/
μ
s op amps.
±
5V to
±
15V supplies.
6.3mA supply current. Good AC and DC specs. 60ns
settling to 0.5LSB.
LT1364/LT1365:
Dual and quad 50MHz, 450V/
μ
s op amps.
±
5V to
±
15V supplies, 6.3mA supply current per amplifier.
60ns settling to 0.5LSB.
W
U
Internal Reference
The LTC1404 has an on-chip, temperature compensated,
curvature corrected, bandgap reference, which is factory
trimmed to 2.43V. It is internally connected to the DAC and
is available at Pin 3 to provide up to 1mA of current to an
external load. For minimum code transition noise, the
reference output should be decoupled with a capacitor to
filter wideband noise from the reference (10
μ
F tantalum in
parallel with a 0.1
μ
F ceramic). The V
REF
pin can be driven
with a DAC or other means to provide input span adjust-
ment in bipolar mode. The V
REF
pin must be driven to at
least 2.46V to prevent conflict with the internal reference.
The reference should not be driven to more than 5V.
Figure 6 shows an LT1360 op amp driving the reference
pin. Figure 7 shows a typical reference, the LT1019A-5
connected to the LTC1404. This will provide an improved
Figure 6. Driving the V
REF
with the LT1360 Op Amp
Figure 7. Supplying a 5V Reference Voltage to the
LTC1404 with the LT1019A-5
drift (equal to the maximum 5ppm/
°
C of the LT1019A-5)
and a
±
4.215V full scale. If V
REF
is forced lower than
2.43V, the REFRDY bit in the serial data output will be
forced to low.
UNIPOLAR/BIPOLAR OPERATION AND ADJUSTMENT
Figure 8 shows the ideal input/output characteristics for
the LTC1404. The code transitions occur midway between
successive integer LSB values (i.e., 0.5LSB, 1.5LSB,
2.5LSB, … FS – 1.5LSB). The output code is natural binary
with 1LSB = 4.096/4096 = 1mV. Figure 9 shows the
input/output transfer characteristics for the bipolar mode
in two’s complement format.
Unipolar Offset and Full-Scale Error Adjustments
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Figure
10a shows the extra components required for full-scale
error adjustment. Figure 10b shows offset and full-scale
adjustment. Offset error must be adjusted before full-
scale error. Zero offset is achieved by applying 0.5mV (i.e.,
0.5LSB) at the input and adjusting the offset trim until the
LTC1404 output code flickers between 0000 0000 0000
and 0000 0000 0001. For zero full-scale error, apply an
analog input of 4.0945V (FS – 1.5LSB or last code transi-
tion) at the input and adjust R5 until the LTC1404 output
code flickers between 1111 1111 1110 and 1111 1111
1111.
1404 F06
–
+
V
REF(OUT)
≥
2.46V
A
IN
V
REF
GND
10
μ
F
3
INPUT RANGE
±
0.843 V
REF(OUT)
5V
–5V
LTC1404
LT1360
V
CC
V
SS
1404 F07
10
μ
F
3
INPUT RANGE
±
4.215V
(=
±
0.843 V
REF
)
–5V
LT1019A-5
10V
V
IN
V
OUT
GND
5V
A
IN
V
REF
GND
LTC1404
V
CC
V
SS
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