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參數(shù)資料
| 型號： | LTC1297 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Single Chip 12-Bit Data Acquisition Systems(5V，單片，12位數(shù)據(jù)采集系統(tǒng)(內(nèi)置采樣和保持)) |
| 中文描述： | 單芯片12位數(shù)據(jù)采集系統(tǒng)（5V的，單片，12位數(shù)據(jù)采集系統(tǒng)（內(nèi)置采樣和保持）） |
| 文件頁數(shù)： | 13/24頁 |
| 文件大小： | 398K |
| 代理商： | LTC1297 |
13
LTC1292/LTC1297
U
S
A
O
PPLICATI
U
U
Figure 6. Several LTC1292/LTC1297s Sharing One 2-Wire Serial Interface
LTC1292
LTC1297
2 CHANNELS
2 CHANNELS
2 CHANNELS
CS
CS
CS
2
2
2
2
2-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR
LTC1292/LTC1297s
2
1
0
OUTPUT PORT
SERIAL DATA
MPU
LTC1292
LTC1297
LTC1292
LTC1297
LTC1292/7 F06
Figure 7. Example Ground Plane
for the LTC1292/LTC1297
1
2
3
4
5
6
7
8
22μF
TANTALUM
V
CC
LTC1292/7 F07
LTC1292
LTC1297
0.1μF
CS
V
CC
HORIZONTAL: 10
μ
s/DIV
minimum and the V
CC
supply should have a low output
impedance such as obtained from a voltage regulator
(e.g., LT323A). For high frequency bypassing a 0.1
μ
F
ceramic disk placed in parallel with the 22
μ
F is
recommended. Again the leads should be kept to a
minimum. Figures 8 and 9 show the effects of good and
poor V
CC
bypassing.
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1292/
LTC1297 have capacitive switching input current spikes.
These current spikes settle quickly and do not cause a
problem. If large source resistances are used or if slow
settling op amps drive the inputs, take care to insure that
the transients caused by the current spikes settle completely
before the conversion begins.
use a PC board. The ground pin (Pin 4) should be tied
directly to the ground plane with minimum lead length (a
low profile socket is fine). Figure 7 shows an example of
an ideal LTC1292/LTC1297 ground plane design for a two-
sided board. Of course this much ground plane will not
always be possible, but users should strive to get as close
to this ideal as possible.
Bypassing
For good performance, V
CC
must be free of noise and
ripple. Any changes in the V
CC
voltage with respect to
ground during a conversion cycle can induce errors or
noise in the output code. V
CC
noise and ripple can be kept
below 0.5mV by bypassing the V
CC
pin directly to the
analog ground plane with a minimum of 22
μ
F tantalum
capacitor and with leads as short as possible. The lead
from the device to the V
CC
supply also should be kept to a
HORIZONTAL: 10
μ
s/DIV
Figure 8. Poor V
CC
Bypassing. Noise and
Ripple Can Cause A/D Errors
Figure 9. Good V
CC
Bypassing Keeps
Noise and Ripple on V
CC
Below 1mV
V
V
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