Load Circuit for tdis and ten
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� LTC1287CCN8
寤犲晢锛� Linear Technology
鏂囦欢闋佹暩(sh霉)锛� 13/16闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DATA ACQ SYS 12BIT 3V 8-DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
椤炲瀷锛� 鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛�
鍒嗚鲸鐜囷紙浣嶏級锛� 12 b
閲囨ǎ鐜囷紙姣忕锛夛細 30k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 涓茶锛屽苟鑱�(li谩n)
闆诲闆绘簮锛� 鍠浕婧�
闆绘簮闆诲锛� 3V
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 閫氬瓟
灏佽/澶栨锛� 8-DIP锛�0.300"锛�7.62mm锛�
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-PDIP
鍖呰锛� 绠′欢
6
LTC1287
1287fa
Load Circuit for tdis and ten
Load Circuit for tdDO, tr and tf
On and Off Channel Leakage Current
Voltage Waveforms for DOUT Delay Time, tdDO
Voltage Waveforms for DOUT Rise and Fall Times, tr, tf
Voltage Waveforms for tdis
3V
A
IOFF
ION
POLARITY
OFF CHANNEL
ON CHANNEL
LTC1287 TC1
W
I
DAGRA
BLOCK
TEST CIRCUITS
CLK
DOUT
0.45V
tdDO
0.6V
2.1V
LTC1287 TC03
DOUT
0.6V
2.1V
tr
tf
LTC1287 TC04
DOUT
3k
100pF
TEST POINT
3V tdis WAVEFORM 2, ten
tdis WAVEFORM 1
LTC1287 TC05
INPUT
SHIFT
REGISTER
COMP
SAMPLE
AND
HOLD
12-BIT
CAPACITIVE
DAC
OUTPUT
SHIFT
REGISTER
12-BIT
SAR
CONTROL
AND
TIMING
VCC
8
ANALOG
INPUT MUX
2
3
VREF
5
GND
4
鈥揑N
+IN
DOUT
6
1
CLK
7
CS
LTC1287 BD
DOUT
WAVEFORM 1
(SEE NOTE 1)
2.1V
tdis
90%
10%
DOUT
WAVEFORM 2
(SEE NOTE 2)
CS
NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.
NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH
THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.
LTC1287 TC06
DOUT
1.5V
3k
100pF
TEST POINT
LTC1287 TC02
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
LTC1287CCN8#PBF 鍔熻兘鎻忚堪:IC DATA ACQ SYS 12BIT 3V 8-DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - ADCs/DAC - 灏堢敤鍨� 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 椤炲瀷:鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛� 鍒嗚鲸鐜囷紙浣嶏級:16 b 閲囨ǎ鐜囷紙姣忕锛�:21.94k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:MICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 闆绘簮闆诲:1.8 V ~ 3.6 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:40-WFQFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:40-TQFN-EP锛�6x6锛� 鍖呰:鎵樼洡
LTC1288CN8 鍔熻兘鎻忚堪:IC A/D CONV SAMPLING 12BIT 8-DIP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 浣嶆暩(sh霉):16 閲囨ǎ鐜囷紙姣忕锛�:45k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:2 鍔熺巼鑰楁暎锛堟渶澶э級:315mW 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-SOIC锛�0.295"锛�7.50mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-SOIC W 鍖呰:甯跺嵎 (TR) 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊�(g猫)鍠锛屽柈妤�
LTC1288CN8#PBF 鍔熻兘鎻忚堪:IC A/D CONV SAMPLING 12BIT 8-DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:TSA1204 View All Specifications 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:20M 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:2 鍔熺巼鑰楁暎锛堟渶澶э級:155mW 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:48-TQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:48-TQFP锛�7x7锛� 鍖呰:Digi-Reel® 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:4 鍊�(g猫)鍠锛屽柈妤�锛�2 鍊�(g猫)宸垎锛屽柈妤� 鐢�(ch菐n)鍝佺洰閷勯爜闈�:1156 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:497-5435-6
LTC1288CN8PBF 鍒堕€犲晢:Linear Technology 鍔熻兘鎻忚堪:LTC1288CN8PBF
LTC1288CS8 鍔熻兘鎻忚堪:IC A/D CONV SAMPLING 12BIT 8SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 浣嶆暩(sh霉):16 閲囨ǎ鐜囷紙姣忕锛�:45k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:2 鍔熺巼鑰楁暎锛堟渶澶э級:315mW 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-SOIC锛�0.295"锛�7.50mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-SOIC W 鍖呰:甯跺嵎 (TR) 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊�(g猫)鍠锛屽柈妤�