參數(shù)資料
型號: LPC3180FEL320
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學處理器
英文描述: 16-32-bit ARM microcontroller; hardware floating-point coprocessor, USB On-The-Go, and SDRAM memory interface
封裝: LPC3180FEL320<SOT824-1 (LFBGA320)|<<http://www.nxp.com/packages/SOT824-1.html<1<Always Pb-free,;LPC3180FEL320/01<SOT824-1 (LFBGA320)|<<http://www.nxp.com/packages/SOT824-
文件頁數(shù): 18/36頁
文件大?。?/td> 763K
代理商: LPC3180FEL320
LPC3180_2
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 02 — 15 February 2007
18 of 36
NXP Semiconductors
LPC3180
16/32-bit ARM microcontroller with external memory interface
status and masked interrupt status registers allow versatile condition evaluation. In
addition to peripheral functions, each of the six general purpose input/output pins and
12 general purpose input pins are connected directly to the interrupt controller.
6.10 General purpose parallel I/O
Some device pins that are not dedicated to a specific peripheral function have been
designed to be general purpose inputs, outputs, or I/Os. Also, some pins may be
configured either as a specific peripheral function or a general purpose input, output, or
I/O. A total of 55 pins can potentially be used as general purpose input/outputs, general
purpose outputs, and general purpose inputs.
GPIO pins may be dynamically configured as inputs or outputs. Separate registers allow
setting or clearing any number of GPIO and GPO outputs controlled by that register
simultaneously. The value of the output register for standard GPIOs and GPO pins may be
read back, as well as the current actual state of the port pins.
There are 12 GPI, 24 GPO, and six GPIO pins. When the SDRAM bus is configured for
16 data bits, 13 of the remaining SDRAM data pins may be used as GPIOs.
6.10.1
Features
Bit-level set and clear registers allow a single instruction set or clear of any number of
bits in one port.
A single register selects direction for pins that support both input and output modes.
Direction control of individual bits.
For input/output pins, both the programmed output state and the actual pin state can
be read.
There are a total of 12 general purpose inputs, 24 general purpose outputs, and six
general purpose input/outputs.
Additionally, 13 SDRAM data lines may be used as GPIOs if a 16-bit SDRAM
interface is used (rather than a 32-bit interface).
6.11 10-bit ADC
The ADC is a three channel, 10-bit successive approximation ADC. The ADC may be
configured to produce results with a resolution anywhere from 10 bits to 3 bits. When high
resolution is not needed, lowering the resolution can substantially reduce conversion time.
The analog portion of the ADC has its own power supply to enhance the low noise
characteristics of the converter. This voltage is only supplied internally when the core has
voltage. However, the ADC block is not affected by any difference in ramp-up time for
VDD_AD and VDD_CORE voltage supplies.
6.11.1
Features
Measurement range of 0 V to VDD_AD28 (nominally 3 V).
Low noise ADC.
Maximum 10-bit resolution, resolution can be reduced to any amount down to 3 bits
for faster conversion.
Three input channels.
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