參數(shù)資料
型號(hào): LMX2531LQ1500EX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 80 MHz, QCC36
封裝: 6 X 6 MM, 0.8 MM, LCC-36
文件頁數(shù): 9/24頁
文件大小: 458K
代理商: LMX2531LQ1500EX
2.4.4 DITHER -- Dithering
Dithering is useful in reducing fractional spurs, especially those that occur a a fraction of the channel spacing. The only exception
is when the fractional numerator is zero. In this case, dithering usually is not a benefit. Dithering also can sometimes increase the
PLL phase noise by a fraction of a dB. In general, if dithering is disabled, phase noise may be slightly better inside the loop bandwidth
of the system, but spurs are likely to be worse too.
DITHER
Dithering Mode
0
Weak Dithering
1
Reserved
2
Strong Dithering
3
Dithering Disabled
2.4.5 FDM -- Fractional Denominator Mode
When this bit is set to 1, the 10 MSB bits for the fractional numerator and denominator are considered. This allows the fractional
denominator to range from 1 to 4,194,303. If this bit is set to zero, only the 12 LSB bits of the fractional numerator and denominator
are considered, and this allows a fractional denominator from 1 to 4095. When this bit is disabled, the current consumption is about
0.5 mA lower.
2.4.6 -- DIV2
When this bit is enabled on the appropriate option, the output of the VCO is divided by 2 on options that offer this feature. This has
a small impact on harmonic content and output power.
DIV2
VCO Output Frequency
0
Not Divided by 2
1
Divided by 2
17
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LMX2531LQ1500E
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