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參數(shù)資料
| 型號： | LMX2335UTM/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO16 |
| 封裝： | PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 35/48頁 |
| 文件大小： | 3127K |
| 代理商： | LMX2335UTM/NOPB |
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2.0 Programming Description (Continued)
2.5.4 PWDN RF2
RF2 SYNTHESIZER POWERDOWN
RF2 N[21]
The PWDN RF2 bit is used to switch the RF2 PLL between a powered up and powered down mode.
Furthermore, the PWDN RF2 bit operates in conjuction with the TRI-STATE ID
o RF2 bit to set a synchronous or an asynchronous
powerdown mode.
Control Bit
Register Location
Description
Function
01
PWDN RF2
RF2 N[21]
RF2 Powerdown
RF2 PLL Active
RF2 PLL Powerdown
2.6 RF1 R REGISTER
The RF1 R register contains the RF1 R_CNTR, PD_POL RF1, ID
o RF1, and TRI-STATE IDo RF1 control words, in addition to two
bits that compose the F
oLD control word. The detailed description and programming information for each control word is
discussed in the following sections.
Reg. Most Significant Bit
SHIFT REGISTER BIT LOCATION
Least Significant Bit
21
20
19
18
17
16
15
14
13
12
11
10
9876543210
Data Field
Address
Field
RF1
R
FoLD1 FoLD3
TRI-
STATE
IDo
RF1
IDo
RF1
PD_
POL
RF1
RF1 R_CNTR[14:0]
1
0
2.6.1 RF1 R_CNTR[14:0]
RF1 SYNTHESIZER PROGRAMMABLE REFERENCE DIVIDER (R COUNTER)
RF1 R[2:16]
The RF1 reference divider (RF1 R_CNTR) can be programmed to support divide ratios from 3 to 32767. Divide ratios less than
3 are prohibited.
Divide Ratio
RF1 R_CNTR[14:0]
14
13
12
11
10
9876543210
3
000000000000011
4
000000000000100
32767
111111111111111
2.6.2 PD_POL RF1
RF1 SYNTHESIZER PHASE DETECTOR POLARITY
RF1 R[17]
The PD_POL RF1 bit is used to control the RF1 synthesizer’s phase detector polarity based on the VCO tuning characteristics.
Control Bit
Register Location
Description
Function
01
PD_POL RF1
RF1 R[17]
RF1 Phase Detector
Polarity
RF1 VCO Negative
Tuning
Characteristics
RF1 VCO Positive
Tuning
Characteristics
RF1 VCO Characteristics
10136782
LMX2335U/LMX2336U
www.national.com
40
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