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參數(shù)資料
| 型號： | LMX2315MDA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 1200 MHz, UUC |
| 封裝： | DIE |
| 文件頁數(shù)： | 3/25頁 |
| 文件大小： | 452K |
| 代理商： | LMX2315MDA |
Functional Description (Continued)
PROGRAMMABLE DIVIDER (N COUNTER)
The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter) If the Control
Bit (last bit shifted into the Data Register) is LOW data is transferred from the 19-bit shift register into a 7-bit latch (which sets
the 7-bit Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter) Serial data format is shown
below
TLW12339 – 20
Note
S8 to S18 Programmable counter divide ratio control bits (3 to 2047)
7-BIT SWALLOW COUNTER DIVIDE RATIO
(A COUNTER)
Divide
S
7
S
6
S
5
S
4
S
3
S
2
S
1
Ratio
A
0
0000000
1
0000001
127
1111111
Note
Divide ratio 0 to 127
B t A
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO
(B COUNTER)
Divide
18
S
17
S
16
S
15
S
14
S
13
S
12
S
11
S
10
SS
9
S
8
Ratio
B
3
0
00000000
1
4
0
00000001
0
2047
1
Note
Divide ratio 3 to 2047 (Divide ratios less than 3 are prohibited)
B t A
PULSE SWALLOW FUNCTION
fVCO e (P c B) a A c fOSC R
fVCO Output frequency of external voltage controlled oscil-
lator (VCO)
B
Preset divide ratio of binary 11-bit programmable
counter (3 to 2047)
A
Preset divide ratio of binary 7-bit swallow counter
(0 s A s 127 A s B)
fOSC Output frequency of the external reference frequency
oscillator
R
Preset divide ratio of binary 14-bit programmable ref-
erence counter (3 to 16383)
P
Preset modulus of dual moduIus prescaler (64 or 128
for 231520 or 32 or 64 for 2325)
http
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