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參數(shù)資料
| 型號(hào)： | LMX2315MDA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 1200 MHz, UUC |
| 封裝： | DIE |
| 文件頁數(shù)： | 10/25頁 |
| 文件大?。?/td> | 452K |
| 代理商： | LMX2315MDA |
Application Information (Continued)
MEASUREMENT RESULTS (Example
1)
TLW12339 – 47
FIGURE 5 PLL Reference Spurs
The reference spurious level is k b74 dBc due to the loop
filter attenuation and the low spurious noise level of the
LMX2315
TLW12339 – 49
FIGURE 6 PLL Phase Noise 10 kHz Offset
The phase noise level at 10 kHz offset is b80 dBcHz
TLW12339 – 48
FIGURE 7 PLL Phase Noise
1 kHz Offset
The phase noise level at 1 kHz offset is b795 dBcHz
TLW12339 – 50
FIGURE 8 Frequency Jump Lock Time
Of concern in any PLL loop filter design is the time it takes
to lock in to a new frequency when switching channels
Fig-
ure 8 shows the switching waveforms for a frequency jump
of 865 MHz to 915 MHz By narrowing the frequency span
of the HP53310A Modulation Domain Analyzer enables
evaluation of the frequency lock time to within g500 Hz
The lock time is seen to be less than 500 ms for a frequency
jump of 50 MHz
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| LMX2315TM | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:1.2 GHz Frequency Synthesizer for RF Personal Communications |
| LMX2315TMX | 功能描述:IC FREQ SYNTH 2.5GHZ 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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