參數(shù)資料
型號(hào)： LMX2315MDA
廠(chǎng)商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： PLL合成/DDS/VCOs
英文描述： PLL FREQUENCY SYNTHESIZER, 1200 MHz, UUC
封裝： DIE
文件頁(yè)數(shù)： 14/25頁(yè)
文件大?。?/td> 452K
代理商： LMX2315MDA
Application Information (Continued)
EXTERNAL CHARGE PUMP
The LMX PLLatinum series of frequency synthesizers are
equipped with an internal balanced charge pump as well as
outputs for driving an external charge pump Although the
superior performance of NSC’s on board charge pump elim-
inates the need for an external charge pump in most appli-
cations certain system requirements are more stringent In
these cases using an external charge pump allows the de-
signer to take direct control of such parameters as charge
pump voltage swing current magnitude TRI-STATE leak-
age and temperature compensation
One possible architecture for an external charge pump cur-
rent source is shown in
Figure 14 The signals wp and wr in
the diagram correspond to the phase detector outputs of
the 23152025 frequency synthesizers These logic sig-
nals are converted into current pulses using the circuitry
shown in
Figure 14 to enable either charging or discharging
of the loop filter components to control the output frequency
of the PLL
Referring to
Figure 14 the design goal is to generate a
5 mA current which is relatively constant to within 5V of the
power supply rail To accomplish this it is important to es-
tablish as large of a voltage drop across R5 R8 as possible
without saturating Q2
Q4
A voltage of approximately
300 mV provides a good compromise This allows the cur-
rent source reference being generated to be relatively re-
peatable in the absence of good Q1 Q2Q3 Q4 matching
(Matched transistor pairs is recommended) The wp and wr
outputs are rated for a maximum output load current of
1 mA while 5 mA current sources are desired The voltages
developed across R4 9 will consequently be approximately
258 mV or 42 mV less than R8 5 due to the current density
differences
0026 1n (5 mA1 mA)
through the Q1
Q2Q3 Q4 pairs
In order to calculate the value of R7 it is necessary to first
estimate the forward base to emitter voltage drop (Vfnp) of
the transistors used the VOL drop of wp and the VOH drop
of wr’s under 1 mA loads (wp’s VOL k 01V and (wrs VOH
k
01V)
Knowing these parameters along with the desired current
allow us to design a simple external charge pump Separat-
ing the pump up and pump down circuits facilitates the no-
dal analysis and give the following equations
R4 e
VR5 b VT 1n
isource
ip max
J
isource
R9 e
VR8 b VT 1n
isink
in max
J
isink
R5 e
VR5 (bp a 1)
ip max (bp a 1) b isource
R8 e
VR8 (bn a 1)
ir max (bn a 1) isink
R6 e
(Vp b VVOLwp) b (VR5 a Vfp)
ip max
R7 e
(VP b VVOHwp) b (VR8 a Vfn)
imax
EXAMPLE
Typical Device Parameters
bn e100 bp e 50
Typical System Parameters
VP e 50V
Vcntl e 05V–45V
Vwp e 00V Vwr e 50V
Design Parameters
ISINK e ISOURCE e 50 mA
Vfn e Vfp e 08V
Irmax e Ipmax e 1mA
VR8 e VR5 e 03V
VOLwp e VOHwp e 100 mV
TLW12339 – 39
FIGURE 14
Therefore select
R4 e R9 e
03V b 0026
1n(50 mA10 mA)
5mA
e
516X
R5 e
03V
(50 a 1)
10 mA
(50 a 1) b 50 mA
e
332X
R8 e
03V
(100 a 1)
10 mA
(100 a 1) b 50 mA
e
3156X
R6 e R7 e
(5V b 01V) b (03V a 08V)
10 mA
e
38 kX
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