Application Information (Continued) 7.0 Offset Voltage Adjustment Offset voltage adjustment circuits ar" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� LMC6484IMX/NOPB
寤犲晢锛� National Semiconductor
鏂囦欢闋佹暩(sh霉)锛� 7/24闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC OP AMP QUAD CMOS R-R 14-SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 2,500
鏀惧ぇ鍣ㄩ鍨嬶細 閫氱敤
闆昏矾鏁�(sh霉)锛� 4
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 1.3 V/µs
澧炵泭甯跺绌嶏細 1.5MHz
闆绘祦 - 杓稿叆鍋忓锛� 0.02pA
闆诲 - 杓稿叆鍋忕Щ锛� 110µV
闆绘祦 - 闆绘簮锛� 2.6mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 30mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 3 V ~ 15.5 V锛�±1.5 V ~ 7.75 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 14-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 14-SOICN
鍖呰锛� 甯跺嵎 (TR)
鐢�(ch菐n)鍝佺洰閷勯爜闈細 1266 (CN2011-ZH PDF)
鍏跺畠鍚嶇ū锛� *LMC6484IMX
LMC6484IMX
LMC6484IMXTR
Application Information (Continued)
7.0 Offset Voltage Adjustment
Offset voltage adjustment circuits are illustrated in
Figures
13, 14. Large value resistances and potentiometers are used
to reduce power consumption while providing typically 2.5
mV of adjustment range, referred to the input, for both
configurations with V
S = 5V.
8.0 Upgrading Applications
The LMC6484 quads and LMC6482 duals have industry
standard pin outs to retrofit existing applications. System
performance can be greatly increased by the LMC6484鈥檚
features. The key benefit of designing in the LMC6484 is
increased linear signal range. Most op-amps have limited
input common mode ranges. Signals that exceed this range
generate a non-linear output response that persists long
after the input signal returns to the common mode range.
Linear signal range is vital in applications such as filters
where signal peaking can exceed input common mode
ranges resulting in output phase inversion or severe distor-
tion.
9.0 Data Acquisition Systems
Low power, single supply data acquisition system solutions
are provided by buffering the ADC12038 with the LMC6484
(
Figure 14). Capable of using the full supply range, the
LMC6484 does not require input signals to be scaled down
to meet limited common mode voltage ranges. The
LMC6484 CMRR of 82 dB maintains integral linearity of a
12-bit data acquisition system to 0.325 LSB. Other
rail-to-rail input amplifiers with only 50 dB of CMRR will
degrade the accuracy of the data acquisition system to only
8 bits.
DS011714-25
FIGURE 12. Inverting Configuration
Offset Voltage Adjustment
DS011714-26
FIGURE 13. Non-Inverting Configuration
Offset Voltage Adjustment
LMC6484
www.national.com
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鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
TSW-130-23-T-D CONN HEADER 60POS .100" DUAL TIN
TSW-141-23-L-S CONN HEADER 41POS .100" SGL GOLD
5-794680-2 22P MICRO MNL ASSY VRT THRU LF
TSW-126-08-T-D-RA CONN HEADER 52PS .100 DL R/A TIN
ISL28276FBZ-T7 IC OPAMP DUAL RRIO PREC 8-SOIC
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鍙冩暩(sh霉)鎻忚堪
LMC6484IN 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
LMC6484IN 鍒堕€犲晢:Texas Instruments 鍔熻兘鎻忚堪:IC OP AMP QUAD CMOS 6484 DIP14
LMC6484IN/NOPB 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 CMOS Quad R/R I/O Op Amp RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
LMC6484MN 鍒堕€犲晢:NSC 鍒堕€犲晢鍏ㄧū:National Semiconductor 鍔熻兘鎻忚堪:CMOS Quad Rail-to-Rail Input and Output Operational Amplifier
LMC6484N 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:CMOS Quad Rail-to-Rail Input and Output Operational Amplifier(970.84 k)