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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | LMC6484IMX/NOPB |
| 寤犲晢锛� | National Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 4/24闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC OP AMP QUAD CMOS R-R 14-SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 閫氱敤 |
| 闆昏矾鏁�(sh霉)锛� | 4 |
| 杓稿嚭椤炲瀷锛� | 婊挎摵骞� |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 1.3 V/µs |
| 澧炵泭甯跺绌嶏細 | 1.5MHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 0.02pA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 110µV |
| 闆绘祦 - 闆绘簮锛� | 2.6mA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 30mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 3 V ~ 15.5 V锛�±1.5 V ~ 7.75 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 14-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 14-SOICN |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1266 (CN2011-ZH PDF) |
| 鍏跺畠鍚嶇ū锛� | *LMC6484IMX LMC6484IMX LMC6484IMXTR |
绗�1闋�绗�2闋�绗�3闋�鐣�(d膩ng)鍓嶇4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�
Typical Performance Characteristics V
S = +15V, Single Supply, TA = 25C unless otherwise
specified (Continued)
Application Information
1.0 Amplifier Topology
The
LMC6484
incorporates
specially
designed
wide-compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input ampli-
fiers, were not used because of their inherent accuracy
problems
due
to
CMRR,
cross-over
distortion,
and
open-loop gain variation.
The LMC6484鈥檚 input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
2.0 Input Common-Mode Voltage Range
Unlike Bi-FET amplifier designs, the LMC6484 does not
exhibit phase inversion when an input voltage exceeds the
negative supply voltage.
Figure 1 shows an input voltage
exceeding both supplies with no resulting phase inversion on
the output.
The absolute maximum input voltage is 300 mV beyond
either supply rail at room temperature. Voltages greatly ex-
ceeding this absolute maximum rating, as in
Figure 2, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
Applications that exceed this rating must externally limit the
maximum input current to 卤5 mA with an input resistor as
shown in
Figure 3.
3.0 Rail-To-Rail Output
The approximated output resistance of the LMC6484 is
180
sourcing and 130 sinking at V
S = 3V and 110
sourcing and 83
sinking at V
S = 5V. Using the calculated
output resistance, maximum output voltage swing can be
estimated as a function of load.
4.0 Capacitive Load Tolerance
The LMC6484 can typically directly drive a 100 pF load with
V
S = 15V at unity gain without oscillating. The unity gain
follower is the most sensitive configuration. Direct capacitive
Stability vs
Capacitive Load
DS011714-89
Stability vs
Capacitive Load
DS011714-90
DS011714-10
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6484 Power Supply Voltages with
No Output Phase Inversion
DS011714-12
FIGURE 2. A 卤7.5V Input Signal Greatly
Exceeds the 3V Supply in
Figure 3 Causing
No Phase Inversion Due to R
I
DS011714-11
FIGURE 3. R
I Input Current Protection for
Voltages Exceeding the Supply Voltage
LMC6484
www.national.com
11
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| TSW-130-23-T-D | CONN HEADER 60POS .100" DUAL TIN |
| TSW-141-23-L-S | CONN HEADER 41POS .100" SGL GOLD |
| 5-794680-2 | 22P MICRO MNL ASSY VRT THRU LF |
| TSW-126-08-T-D-RA | CONN HEADER 52PS .100 DL R/A TIN |
| ISL28276FBZ-T7 | IC OPAMP DUAL RRIO PREC 8-SOIC |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| LMC6484IN | 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁�(b菙)鍎熼浕澹�:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel |
| LMC6484IN | 鍒堕€犲晢:Texas Instruments 鍔熻兘鎻忚堪:IC OP AMP QUAD CMOS 6484 DIP14 |
| LMC6484IN/NOPB | 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 CMOS Quad R/R I/O Op Amp RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁�(b菙)鍎熼浕澹�:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel |
| LMC6484MN | 鍒堕€犲晢:NSC 鍒堕€犲晢鍏ㄧū:National Semiconductor 鍔熻兘鎻忚堪:CMOS Quad Rail-to-Rail Input and Output Operational Amplifier |
| LMC6484N | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:CMOS Quad Rail-to-Rail Input and Output Operational Amplifier(970.84 k) |
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