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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | LMC6484IMX/NOPB |
| 寤犲晢锛� | National Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 6/24闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC OP AMP QUAD CMOS R-R 14-SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 2,500 |
| 鏀惧ぇ鍣ㄩ鍨嬶細 | 閫氱敤 |
| 闆昏矾鏁�(sh霉)锛� | 4 |
| 杓稿嚭椤炲瀷锛� | 婊挎摵骞� |
| 杞�(zhu菐n)鎻涢€熺巼锛� | 1.3 V/µs |
| 澧炵泭甯跺绌嶏細 | 1.5MHz |
| 闆绘祦 - 杓稿叆鍋忓锛� | 0.02pA |
| 闆诲 - 杓稿叆鍋忕Щ锛� | 110µV |
| 闆绘祦 - 闆绘簮锛� | 2.6mA |
| 闆绘祦 - 杓稿嚭 / 閫氶亾锛� | 30mA |
| 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� | 3 V ~ 15.5 V锛�±1.5 V ~ 7.75 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 14-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 14-SOICN |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1266 (CN2011-ZH PDF) |
| 鍏跺畠鍚嶇ū锛� | *LMC6484IMX LMC6484IMX LMC6484IMXTR |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�鐣�(d膩ng)鍓嶇6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�
Application Information (Continued)
of the ultra-low input current of the LMC6484, typically less
than 20 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6484鈥檚 inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp鈥檚 inputs, as in
Fig-
ure 9. To have a significant effect, guard rings should be
placed in both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
12
, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 250 times degradation from the LMC6484鈥檚
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 10
11
would
cause only 0.05 pA of leakage current. See
Figure 10 for
typical connections of guard rings for standard op-amp
configurations.
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don鈥檛 insert the amplifier鈥檚 input pin into the
board at all, but bend it up in the air and use only air as an
insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort
of
using
point-to-point
up-in-the-air
wiring.
See
Figure 11.
DS011714-20
FIGURE 9. Example of Guard Ring in P.C. Board
Layout
DS011714-21
Inverting Amplifier
DS011714-22
Non-Inverting Amplifier
DS011714-23
Follower
FIGURE 10. Typical Connections of Guard Rings
DS011714-24
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
FIGURE 11. Air Wiring
LMC6484
www.national.com
13
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| TSW-130-23-T-D | CONN HEADER 60POS .100" DUAL TIN |
| TSW-141-23-L-S | CONN HEADER 41POS .100" SGL GOLD |
| 5-794680-2 | 22P MICRO MNL ASSY VRT THRU LF |
| TSW-126-08-T-D-RA | CONN HEADER 52PS .100 DL R/A TIN |
| ISL28276FBZ-T7 | IC OPAMP DUAL RRIO PREC 8-SOIC |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| LMC6484IN | 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel |
| LMC6484IN | 鍒堕€犲晢:Texas Instruments 鍔熻兘鎻忚堪:IC OP AMP QUAD CMOS 6484 DIP14 |
| LMC6484IN/NOPB | 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 CMOS Quad R/R I/O Op Amp RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel |
| LMC6484MN | 鍒堕€犲晢:NSC 鍒堕€犲晢鍏ㄧū:National Semiconductor 鍔熻兘鎻忚堪:CMOS Quad Rail-to-Rail Input and Output Operational Amplifier |
| LMC6484N | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:CMOS Quad Rail-to-Rail Input and Output Operational Amplifier(970.84 k) |
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