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參數(shù)資料
| 型號： | LM9801 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Greyscale/24-Bit Color Linear CCD Sensor Processor |
| 中文描述： | Greyscale/24-Bit彩色線陣CCD傳感器處理器 |
| 文件頁數(shù)： | 30/34頁 |
| 文件大?。?/td> | 520K |
| 代理商： | LM9801 |
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Applications Information
(Continued)
The PGA gain coefficient register and PGA Gain Source bit
are used during calibration (see Section 5.0). The Power
Down bit should be set to 0 for normal operation. The Offset
Add bit is also programmed during calibration.
The VGA and Offset DAC bits are programmed during cali-
bration (Section 5.0). The Test Mode bits should always be
set to ‘‘0’’.
9.0 TYPICAL CIS APPLICATION
Many CIS sensors (such as those made by Dyna Image
Corporation) have only one clock input, a transfer signal,
and an output signal that is referred to ground (Figure 18).
Figure 19 shows the analog and digital circuitry required to
connect a typical Dyna CIS to the LM9801.
TL/H/12814–45
FIGURE 18. CIS Waveforms
TL/H/12814–46
FIGURE 19. Minimum CIS Interface
Because the CIS requires only one clock with a duty cycle of
less than 50%, the LM9801’s RS output is used as the
CIS’s CLK source.
w
1 and
w
2 are not used. The 74HC74
D flip-flop is used to lengthen the transfer pulse (SI, or ‘‘Shift
In’’ on the CIS) so that it overlaps the first RS pulse and
meets the timing requirement of the CIS (see Figure 20).
The final ‘‘trick’’ required to interface a CIS to the LM9801 is
the generation of optical black pixels for the LM9801 to
clamp to at the beginning of a line. Unlike CCDs, CIS devic-
es do not have a sequence of optical black pixels at the
beginning of a lineDthe first pixel out of a CIS is valid image
data. There are several ways to create black pixels for the
LM9801 to clamp to.
TL/H/12814–47
FIGURE 20. CIS Interface Digital Timing
The simplest solution is to physically place a light shield
(black plastic, tape or metal) over the first 10 or so pixels.
This reduces the voltage output of the CIS to nearly 0V,
which is adequate for the LM9801 to clamp to. This has the
side effect of slightly reducing the number of active pixels
available for image capture.
A second option is to artifically generate ‘‘black’’ pixels by
holding the CLOCK input high for 10 or so RS pulses(Figure
21). This forces the output voltage to zero for the time that
the CLOCK input is high, and only one active image pixel is
lost. The BLACK signal could be generated by the ASIC/ex-
ternal logic that generates a pulse on the first rising edge of
RS after the TR pulse.
TL/H/12814–48
FIGURE 21. Generating Artificial Black Pixels
http://www.national.com
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相關代理商/技術參數(shù) |
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| LM9810 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LM9810/20 10/12-Bit Image Sensor Processor Analog Front End |
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