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參數(shù)資料
| 型號： | LM9627 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Metal Foil Resistor; Series:SMR1D; Resistance:2.5kohm; Resistance Tolerance:+/- 0.01 %; Power Rating:0.25W; Temperature Coefficient:+/-0.6 ppm; Terminal Type:PCB Surface Mount; Leaded Process Compatible:No |
| 中文描述： | 彩色CMOS圖像傳感器顯卡30醫(yī)科 |
| 文件頁數(shù)： | 10/37頁 |
| 文件大?。?/td> | 370K |
| 代理商： | LM9627 |
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Confidential
10
www.national.com
Functional Description
1.0
OVERVIEW
1.1
The LM9627 contains a CMOS active pixel array consisting of
648 rows by 488 columns. This active region is surrounded by 8
columns and 8 rows of optically shielded (black) pixels as shown
in Figure7.
Light Capture and Conversion
8 columns, 8 rows
black pixels
8 columns, 8 rows
black pixels
648 columns, 488 rows
color (Bayer pattern) active pixels
Figure 7: CMOS APS region of the LM9627
The color filters are Bayer pattern coded starting at row 8 and
column 8. (rows 0 to 7 & columns 0 to 7 are black). The color
coding is green, red, green, red until the end of row 8, then blue,
green, blue, green until the end or row 9 and so on (see Figure
7).
At the beginning of a given integration time the on-board timing
and control circuit will reset every pixel in the array one row at a
time as shown in Figure 8. Note that all pixels in the same row
are simultaneously reset, but not all pixels in the array.
a
b
c
d
e
f
g
h
i
j
k
l
m n
o
p
q
r
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CDS/Shift Register
L
Analog Data Out
Figure 8: CMOS APS Row and Column addressing scheme
At the end of the integration time, the timing and control circuit
will address each row and simultaneously transfer the integrated
value of the pixel to a correlated double sampling circuit and
then to a shift register as shown in Figure 8.
Once the correlated double sampled data has been loaded into
the shift register, the timing and control circuit will shift them out
one pixel at a time starting with column “a”.
The pixel data is then fed into an analog video amplifier, where a
user programmed gain is applied (see Figure 9).
After gain adjustment the analog value of each pixel is con-
verted to a 12 bit digital data as shown in Figure 9.
12 Bit A/D
Video
AMP
Analog pixel values
Digital pixel data
0-15dB
Figure 9: Analog Signals Conditioning & Conversion to
Digital
The digital pixel data is further processed to:
remove defects due to bad pixels,
compensate black level, before being framed and presented
on the digital output port. (see Figure 10).
Figure 10. Digital Pixel Processing.
1.2
The programming, control and status monitoring of the LM9627
is achieved through a two wire I
2
C compatible serial bus. In
addition, a slave address pin is provided (see Figure 11).
Program and Control Interfaces
Figure 11. Control Interface to the LM9627.
Additional control and status pins: snapshot and external event
synchronization are provided allowing the latency of the serial
control port to be bypassed during single frame capture. An
interrupt request pin is also available allowing complex snapshot
operations to be controlled via an external micro-processor (see
Figure 12).
Figure 12. Snapshot & External Event Trigger Signals
B
C
D
F
B
C
do[11:0]
pclk
hsync
vsync
I
2
C Compatible
Serial I/F
Register Bank
sda
sclk
sadr
Timing
Generator
irq
snapshot
extsyn
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM9627CCEA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Color CMOS Image Sensor VGA 30 FPS |
| LM9627HEADBOARD | 功能描述:EVALUATION BOARD FOR LM9627 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標準包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| LM9628 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LM9628 Color CMOS Image Sensor VGA 30 FPS |
| LM9628EVAL-KIT | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LM9628 Color CMOS Image Sensor VGA 30 FPS |
| LM9628IEA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LM9628 Color CMOS Image Sensor VGA 30 FPS |
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