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參數(shù)資料
| 型號： | LM5067SD-2 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, DSO10 |
| 封裝： | LLP-10 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 690K |
| 代理商： | LM5067SD-2 |
Connection Diagrams
30030902
Top View
10-Lead MSOP
30030903
Top View
10-Lead LLP
Ordering Information
Order Number
Fault Response
Package Type
NSC Package Drawing
Supplied As
LM5067MM-1
Latch Off
MSOP-10
MUB10A
1000 Units on Tape and Reel
LM5067MMX-1
Latch Off
3500 Units on Tape and Reel
LM5067MM-2
Auto Restart
1000 Units on Tape and Reel
LM5067MMX-2
Auto Restart
3500 Units on Tape and Reel
LM5067SD-1
Latch Off
LLP-10
SDA10A
Available Soon
LM5067SDX-1
Latch Off
Available Soon
LM5067SD-2
Auto Restart
Available Soon
LM5067SDX-2
Auto Restart
Available Soon
Pin Descriptions
Pin
#
Name
Description
Applications Information
1
VCC
Positive supply input Connect to system ground through a resistor. Connect a bypass capacitor to VEE. The
voltage from VCC to VEE is nominally 13V set by an internal zener diode.
2
UVLO/
EN
Under-voltage
lockout
An external resistor divider from the system input voltage sets the under-voltage turn-on
threshold. The enable threshold at the pin is 2.5V above VEE. An internal 22 A current
source provides hysteresis. This pin can be used for remote enable and disable.
3
OVLO
Over-voltage lockout An external resistor divider from the system input voltage sets the over-voltage turn-off
threshold. The disable threshold at the pin is 2.5V above VEE. An internal 22 A current
source provides hysteresis.
4
PWR
Power limit set
An external resistor at this pin, in conjunction with the current sense resistor (R
S), sets the
maximum power dissipation in the external series pass MOSFET.
5
VEE
Negative supply
input
Connect to the system negative supply voltage (typically -48V).
6
TIMER
Timing capacitor
An external capacitor at this pin sets the insertion time delay and the fault timeout period.
The capacitor also sets the restart timing of the LM5067-2.
7
SENSE Current sense input The voltage across the current sense resistor (R
S) is measured from VEE to this pin. If the
voltage across R
S reaches 50 mV the load current is limited and the fault timer activates.
8
GATE
Gate drive output
Connect to the external N-channel MOSFET’s gate.
9
OUT
Output feedback
Connect to the external MOSFET’s drain. Internally used to determine the MOSFET V
DS
voltage for power limiting, and to control the PGD output pin.
10
PGD
Power Good
indicator
An open drain output capable of sustaining 80V when off. When the external MOSFET
V
DS decreases below 1.23V the PGD pin switches high. When the external MOSFET VDS
increases above
2.5V the PGD pin switches low.
www.national.com
2
LM5067
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