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參數(shù)資料
| 型號(hào)： | LM3101 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Secondary-Side PWM Controller |
| 中文描述： | 二次側(cè)PWM控制器 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 319K |
| 代理商： | LM3101 |
Typical Applications
(Continued)
POWER STAGE OPERATION
The LM3001 Primary-Side PWM Driver sends a pulse-width-
modulated signal (via pin 8) to a power switch, which in turn,
drives a power transformer.
The power switch used in this case is an IRF840 Power
MOSFET. It is an N-channel enhancement mode device
that has a drain-to-source voltage (V
DSS
) rating of 500V and
a pulsed drain current (I
DM
) rating of 32A. Even though the
Power MOFSET has a high V
DSS
, snubber circuits are
needed to limit the drain voltage.
The power transformer has a primary inductance of 87
m
H.
The primary-to-secondary turns ratio is 8.5 to 1 and the sec-
ondary-to-tertiary turns ratio is 1 to 2.5. The tertiary winding
delivers the LM3001 supply voltage (pins 7 and 12) to the
primary-side driver.
There is an internal Overvoltage Threshold circuit (pin 10)
monitoring the input voltage via a resistor divider. The over-
voltage trip point is 3.3V typically. With the resistor values
shown, the maximum supply voltage is approximately 17.5V.
The output rectifier, an SR1606, delivers the secondary cur-
rent to the output. The SR1606 is specified for 16A forward
current, 60V reverse breakdown voltage, and comes to a
TO220-AB package. Since the SR1606 dissipates 7W to
8W at full load, it requires a heatsink. An RC snubber is
placed in parallel to reduce the ringing voltage caused by
the output rectifier turning off during the discontinous mode
of operation.
Two Cornell Dubilier type 226 470
m
F, 25V high frequency
capacitors, with low ESRs of 0.25
X
, are used as the output
capacitors.
OUTPUT VOLTAGE CONTROL
The output voltage is controlled by the LM3101 Secondary-
Side PWM Controller. The LM3101 uses its error amplifier to
compare the scaled-down output voltage against the inter-
nal precision 1.24V reference voltage. The error amplifier
provides compensation for the regulator frequency re-
sponse, by way of an RC feedback network.
The resulting error voltage is converted into a pulse-width-
modulated waveform at the system oscillator frequency of
approximately 500 kHz. This waveform is then differentiated
(using an external high-pass RC filter) into a series of posi-
tive and negative pulses representing the desired switch
duty cycle.
The pulses are transferred through a pulse transformer to
the LM3001 Primary-Side Driver. The driver takes the feed-
back pulse signal and converts it into a PWM gate drive for
the Power MOSFET.
FAULT RECOVERY OPERATION
A 0.167
X
resistor sets the peak primary current limits to
2.28A for the pulse-by-pulse limiting, and to 3.60A for the
second-level limit. An RC network filters the current limit
voltage to prevent the current limit (pin 6) from being acti-
vated by the reverse recovery spike of the output rectifier.
When the second level current limit is triggered, the LM3001
shuts down and discharges the capacitor connected to pin 5
(the Shutdown Delay capacitor). After the capacitor is re-
charged to a voltage of approximately 2.1V, the device will
try to restart. If the overcurrent condition persists, the device
will shut down again.
The LM3101 provides the fault protection in case of an out-
put short circuit. During normal operation, the operating fre-
quency of this circuit is determined by a 25 k
X
resistor con-
nected to pin 1 of the LM3101. However, during a short
circuit condition on the output, the frequency of the LM3101
(and the entire circuit operating frequency) drops, yielding a
very low duty cycle. This short-circuit frequency is set by the
13 k
X
resistor connected to pin 5.
The LM3101 Mode Control and Current Mode Input pins
(pins 2 and 6 respectively) are for current mode control op-
eration. The MC pin determines which control mode is being
usedDthe resistor tied to the supply voltage means voltage
mode control (the resistor tied to ground would indicate cur-
rent mode control).
START-UP OPERATION
When power is initially applied to the regulator, the LM3001
Primary-Side PWM Driver receives its supply current
through a 75 k
X
resistor connected to the input voltage (see
Figure 7). Once the supply pin voltage reaches the thresh-
old of 11.8V (typical), the LM3001 turns on, sending pulse
signals (with an amplitude of approximately 10V) to the gate
of the Power MOSFET. Because the output is driving Power
MOSFETs, which need gate-to-source voltages greater
than 10V for hard turn-on (low R
DS(ON)
), the threshold volt-
age of 11.8V was selected to insure sufficient output volt-
age.
At the beginning of the start-up process, the secondary side
of the regulator is still unbiasedDhence the LM3001 does
not receive a feedback signal from the secondary side (see
the Start-up Sequence inFigure 9). Before the LM3101 Sec-
ondary-Side PWM Controller is controlling the circuit, the
initial operating frequency of the gate drive is determined by
the LM3001 internal oscillator. The oscillator uses an exter-
nal capacitor and resistor, on pins 14 and 1 respectively.
The initial operating frequency in this case is approximately
500 kHz. During this time, the regulator is operating in a
‘‘free-running’’ state.
Also during the start-up, the LM3001 executes Soft-Start by
using the Soft-Start capacitor on pin 4. The voltage across
this capacitor is compared to the oscillator ramp on pin 14
(see the LM3001 block diagram). In the offline regulator, the
Soft-Start time is 15
m
s approximately.
During this time, as the Soft-Start capacitor charges up, the
duty cycle increases with each progressive cycle, until final-
ly the duty cycle reaches its maximum value set by the Duty
Cycle Limit circuit (R
DL
- pin 2) or the Current Limit circuit
(CLIM - pin 6). The Soft-Start phase ends when the duty
cycle is limited by the R
DL
circuit. A resistor at this pin con-
nects to an internal current source which together will gen-
erate a voltage that will be compared to the oscillator ramp
voltage. This comparison will determine the maximum duty
cycle during this phase of the start-up cycle. For the circuit
in Figure 7, the duty cycle is limited to 63% by the R
DL
circuit.
13
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