- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385479 > LM1893N (NATIONAL SEMICONDUCTOR CORP) RES 250K-OHM 1% 0.125W THICK-FILM SMD-0805 5K/REEL-7IN-PA PDF資料下載
參數(shù)資料
| 型號(hào)： | LM1893N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | RES 250K-OHM 1% 0.125W THICK-FILM SMD-0805 5K/REEL-7IN-PA |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDIP18 |
| 封裝： | PLASTIC, DIP-18 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大小： | 576K |
| 代理商： | LM1893N |
Application Information
*
THE DATA PATH
The BI-LINE
TM
chip serves as a power line interface in the
carrier-current transceiver (CCT) system of Figure 3. Figure
4 shows the interface circuit now discussed. The controller
may select either the transmit (TX) or receive (RX) mode.
Serial data from the controller is used to generate a FSK-
modulated 50 to 300 kHz carrier on the line in the TX mode.
In the RX mode line signal passes through the coupling
transformer into the PLL-based receiver. The recreated seri-
al bit stream drives the controller.
With the IC in the TX mode (pin 5 a logic high), baseband
data to 5 kHz drive the modulator’s Data In pin to generate
a switched 0.978I/1.022I control current to drive the low TC,
triangle-wave, current-controlled oscillator to
g
2.2% devia-
tion. The tri-wave passes through a differential attenuator
and sine shaper which deliver a current sinusoid through an
automatic level control (ALC) circuit to the gain of 200 cur-
rent output amplifier. Drive current from the Carrier I/O de-
velops a voltage swing on T
1
’s (Figure 4) resonant tank
proportional to line impedance, then passes through the
step-down transformer and coupling capacitor C
C
onto the
line. Progressively smaller line impedances cause reduced
signal swing, but never clipping-thus avoiding potential radio
frequency interference. When large line impedances threat-
en to allow excessive output swing on pin 10, the ALC
shunts current away from the output amplifier, holding the
voltage swing constant and within the amp’s compliance
limit. The amplifier is stable with a load of any magnitude or
phase angle.
In the RX mode (pin 5 a logic low), the TX sections on the
chip are disabled. Carrier signal, broad-band noise, transient
spikes, and power line component impinge of the receiver’s
input highpass filter, made up of C
C
and T
1
, and the tank
bandpass filter. In-band carrier signal, band-limited noise,
heavily attenuated line frequency component, and attenuat-
ed transient energy pass through to produce voltage swing
on the tank, swinging about the positive supply to drive the
Carrier I/O receiver input. The balanced Norton-input limiter
amplifier removes DC offsets, attenuates line frequency,
performs as a bandpass filter, and limits the signal to drive
the PLL phase detector differentially. The differential de-
modulated output signal from the phase detector, contain-
ing AC and DC data signal, noise, system DC offsets, and a
large
twice-the-carrier-frequency
through a 3-stage RC lowpass filter to drive the offset can-
cel circuit differentially. The offset cancelling circuit works
by insuring that the (fixed)
g
50 mV signal delivered to the
data squaring (‘‘slicing’’) comparator is centered around the
0 mV comparator switch point. Whenever the comparator
signal plus DC offset and noise moves outside the carefully
matched
g
50 mV voltage ‘‘window’’ of the offset cancel
circuit, it adjusts its DC correction voltage in series with the
differential signal to force the signal back into the window.
While the signal is within the
g
50 mV window, the DC offset
is stored on capacitor C
M
. By grace of the highly non-linear
offset hold capacitor charging during offset cancelling, the
DC cancellation is done much more quickly than with an AC
coupling capacitor normally used in place of the offset can-
cel circuit. Since impulse noise spikes normally ring the sig-
nal symmetrically around 0 V, the fully bilateral offset cancel
topology affords excellent noise rejection. The switched cur-
rent output of the comparator drives the impulse noise filter
integrator capacitor that rejects all data pulses of less than
the integrator charge time. Noise appears as duty-cycle jitter
at the open collector serial data output.
component,
passes
Dual-In-Line Package
TL/H/6750–2
Top View
Order Number LM1893N
See NS Package Number N18A
Small Outline & Dual-In-Line Package
TL/H/6750–41
Top View
Order Number LM2893M or LM2893N
See NS Package Number M20B or N20A
FIGURE 2. Connection Diagrams
TL/H/6750–3
FIGURE 3. The block diagram of a carrier-current
system using the Bi-Line chip to interface digital
controllers via the power line
*
Unless otherwise noted, all pin references refer to LM1893, but hold true
for equivalent LM2893 pin.
6
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LM2893M | LM1893/LM2893 Carrier-Current Transceiver |
| LM2893N | LM1893/LM2893 Carrier-Current Transceiver |
| LM2895 | AUDIO POWE RAMPLIFIER |
| LM1895 | AUDIO POWE RAMPLIFIER |
| LM1895N | AUDIO POWE RAMPLIFIER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM1893N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Carrier/Multi-Wire Interface |
| LM1893N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Carrier/Multi-Wire Interface |
| LM1894 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dynamic Noise Reduction System DNR |
| LM1894M | 制造商:Panasonic Industrial Company 功能描述:IC |
| LM1894M/NOPB | 功能描述:IC DYNAM NOISE REDUCT SYS 14SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。