參數(shù)資料
型號: LM1893N
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡
英文描述: RES 250K-OHM 1% 0.125W THICK-FILM SMD-0805 5K/REEL-7IN-PA
中文描述: SPECIALTY TELECOM CIRCUIT, PDIP18
封裝: PLASTIC, DIP-18
文件頁數(shù): 13/24頁
文件大小: 576K
代理商: LM1893N
Component Selection
(Continued)
TL/H/6750–22
FIGURE 20. Size C
M
assuming a 2 bit-time
receive bias time
C
I
The impulse noise filter integrator capacitor C
I
is used to
disallow the passage of any pulse shorter than the integra-
tor charge time. That charge time, set to a nominal
(/2
bit
time, is the time required for a
g
50
m
A charge current to
swing C
I
over a 2 V
BE
range. Charge time under worst case
conditions must never be greater than a bit time since no
signal could then pass. Using a
g
10% capacitor, full junc-
tion temperature range, and full specified current range, a
maximum nominal charge time of
(/2
bit is recommended.
Figure 21 gives C
I
versus data rate under those conditions.
R
C
The collector pull-up resistor is sized to supply adequate
pull-up current drive and speed while preserving adequate
output low current drive.
TL/H/6750–24
FIGURE 21. Impulse noise filter cap. C
I
versus F
DATA
where the charge time is
(/2
bit time
Z
A
The 5.1V silicon zener diode Z
A
is required when a short
RX-to-TX switch-over time is needed at the same time that
the chip is operating in the RX mode with a pin 10 input
signal swing approaching or exceeding twice the supply
voltage. Predominant causes of these large swings imping-
ing on the RX input are: 1) a transmitter’s supply voltage
higher than the receiver’s supply voltage, 2) a TX and RX
pair that are electrically close, or, 3) a higher RX T
1
step-up
turns ratio than the TX T
1
step-down ratio.
Normally, when in the RX mode with small incoming signal
on pin 10, the ALC remains off with pin 7 at a 6V
(V
Z
b
2V
BE
) bias voltage. C
A
is then charged to 6V. TX
mode may then be selected with 6V on C
A
allowing 100%
TX power to pump T
1
’s tuned circuit, and so the AC line,
quickly for fast RX-to-TX switch time. As TX output swing
increases so that pin 10 swings below V
ALC
(4.7V typically),
that ALC activates to charge C
A
to about 6.6V to reduce TX
output drive. However, if in the RX mode pin 10 ever swings
below V
ALC
, C
A
will charge to above 6.6V. Now, when the
TX mode is selected with C
A
at 6.6V, somewhere from 0 to
100% TX output drive is available to pump T
1
’s tuned circuit
resulting in a slower rising line signal - effectively reducing
the RX-to-TX switch time.
Use a 5.1V Z
A
driven by a 0 to 0.8V logic low signal to
guarantee over-temp. operation. R
A
must be in series with
Z
A
to limit current flow and should never fall below 1 k
X
. If
R
A
is less than 1 k
X
, then put a 2 k
X
resistor in series with
Z
A
. Logic high voltages above 10V will cause current flow
into pin 7 that must be limited to 1 mA (with R
A
or a
series R).
Breadboarding Tips
During CCT system evaluation, some techniques listed be-
low will simplify certain measurements.
D Use caution when working on this circuit - dangerous
line voltages may be present.
D When evaluating PLL operation, offset cancel circuit op-
eration, and loop filter values, use the filter of Figure 22
to view the demodulated signal minus the 2F
O
and noise
components. This filter models the RC lowpass filter on
chip.
TL/H/6750–25
FIGURE 22. Circuit to view the differential demodulated data signal, minus the noise and 2F
O
components,
conveniently with a single-ended gain-of-one output
13
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