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參數(shù)資料
| 型號(hào)： | LM1229 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | I2C Compatible CMOS TV RGB and Deflection Processor |
| 中文描述： | I2C兼容的CMOS電視RGB和偏轉(zhuǎn)處理器 |
| 文件頁(yè)數(shù)： | 13/27頁(yè) |
| 文件大?。?/td> | 969K |
| 代理商： | LM1229 |
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Application Information
(Continued)
Pin
No.
31
32
Pin Name
Schematic
Description
HOSC2
HOSC1
The oscillator can be a standard 12 MHz
ceramic or crystal oscillator. Two suitable
manufacturer’s part numbers are Murata
CST12.0MT and Panasonic PX1200MC-ND.
34
XRAY
This pin provides X-ray sense and shutdown.
The input is a rectified horizontal flyback pulse.
R
B
is adjusted to cause shutdown at the desired
amplitude of the flyback pulse. This provides
X-ray protection by turning off the horizontal
drive. After the shutdown, the LM1229 will be
reset when V
CC
drops below 4V or when the
HDRIVE output is disabled and reenabled with
bit 5 of the HEHT register. This shutdown
function can be disabled by setting bit 6 of the
HEHT register to a 1.
These are the horizontal and vertical sync inputs
to the LM1229. The horizontal sync is required
by the horizontal PLL and the horizontal blanking
function. The vertical sync is required by the
vertical blanking function which includes the
programmable vertical blanking output pulse and
the RGB vertical blanking. These are both 5V
logic levels with thresholds as given in the
specifications section. Care must be taken to
prevent sync overshoots from reaching the
LM1229.
These are the DAC outputs for the RGB cathode
cut-off adjustments. The DAC output levels are
set through the I
2
C compatible bus. These can
be set for 4.2V or 2.1V full scale to match the
various NSC bias ICs.
NSC’s CRT arcing tests and experience shows
that the best output termination for the DAC
outputs is a 0.1 μF capacitor to ground at the IC
terminals and a series 1k resistor close to the
load.
This is a positive going logic pulse which can be
used for vertical blanking on G1. It can be an
input to the LM2485 where it is amplified to
either 20V or 40V negative going peak to peak,
depending on an option pin. The pulse starts
when an input is received on the Vertical Flyback
Input on pin 62 and lasts for the number of scan
lines loaded in the VBLANK register, 0x51[7:0].
35
36
HSYNC
VSYNC
37
38
39
DAC 3 Output
DAC 2 Output
DAC 1 Output
40
VBLANK
OUT
L
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| LM1229VEC | I2C Compatible CMOS TV RGB and Deflection Processor |
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相關(guān)代理商/技術(shù)參數(shù) |
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| LM1229YA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:I2C Compatible CMOS TV RGB and Deflection Processor |
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