參數(shù)資料
型號: LH79520N0Q000B1
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學(xué)處理器
英文描述: System-on-Chip
封裝: LH79520N0Q000B1<SOT1017-1 (LQFP176)|<<http://www.nxp.com/packages/SOT1017-1.html<1<Always Pb-free,;
文件頁數(shù): 42/59頁
文件大?。?/td> 666K
代理商: LH79520N0Q000B1
LH79520
System-on-Chip
42
Rev. 01
16 July 2007
Preliminary data sheet
NXP Semiconductors
Color LCD Controller System Timing
Waveforms
This section contains typical output waveform dia-
grams.
STN HORIZONTAL TIMING
Figure 23 presents typical horizontal timing wave-
forms for STN panels. Figure 23 shows that the CLCDC
Clock (an input to the CLCDC) is scaled within the
CLCDC and utilized to produce the LCDDCLK output.
Figure 24 presents typical vertical timing waveforms
for STN panels.
TFT HORIZONTAL TIMING
Figure 25 presents typical horizontal timing wave-
forms for TFT panels.
TFT VERTICAL TIMING
Figure 26 presents typical vertical timing waveforms
for TFT panel
s.
AD-TFT AND HR-TFT HORIZONTAL TIMING
WAVEFORMS
Figure 27 presents typical horizontal timing wave-
forms for AD-TFT and HR-TFT panels. The ALI adjusts
and delays the normal TFT timing for the Row and Col-
umn driver chips integrated into AD-TFT and HR-TFT
panels. Other panels requiring the use of the ALI will
have similar timing waveforms.
AD-TFT AND HR-TFT VERTICAL TIMING
Figure 28 presents typical vertical timing wave-
forms for AD-TFT and HR-TFT panels
.
The power
sequencing and register information is the same
as for TFT vertical timing.
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