參數(shù)資料
型號(hào)： LC85632
元件分類： 時(shí)鐘及定時(shí)
英文描述： LED CLOCK, PDIP30
封裝： DIP-30
文件頁(yè)數(shù)： 24/34頁(yè)
文件大?。?/td> 394K
代理商： LC85632
LC85632
Self Test Mode
* TEST [Pin 18]
VSS
OPEN
VDD
LED self test mode
Normal operation
IC test, illegal setting
This IC provides a self-test mode for testing the LED display and the three value input pins. It supports the following
tests.
The LEDs can be tested for failure to light and for unbalanced intensity.
This test mode is entered when a low level is applied to the TEST pin (pin 18), and all LED segments are lit. In this state,
the LED segments can be turned off individually by applying high or low levels to the three value input pins. The
correspondence between the applied inputs and the segments that are turned off is shown in the table below.
Input pin
Input level
Corresponding LED segment*1
RT-TIME SET
High level
a segment*2
TIME SET INPUT
High level
b segment
TIME SET INPUT
Low level
c segment
ALM-A/B DISP & SEL
High level
d segment*2
ALM-A/B DISP & SEL
Low level
e segment
MANUAL & SLEEP
High level
f segment
MANUAL & SLEEP
Low level
g segment
CAL DISP & SNOOZE
Both*3
COLON
RT-TIME SET
Low level
AM, PM, ALM-A, ALM-B
Note: 1. The LED segments are lit or turned off at the same time for all digits. For example, after setting the IC to LED test mode, if a high level is applied to
the TIME SET INPUT pin, then all 4 a segments (one LED in each 4 digits) are turned off.
2. Due to details of the output pins only the 10’SHR d segment is not linked to rest of the d segment, but is turned off an on along with the a segment.
3. Operates identically for both high and low level signals.
4. Since the operations in the above table are toggle operations, repeated application of signals to the three value inputs will repeatedly turn each
segment on and off.
5. When the IC is in the LED test mode, the MODE SELECT pin must be held at either the high, open, or low level. Operation of the IC is not
guaranteed if the signal on the MODE SELECT pin changes while the IC is in the LED test mode.
6. The TEST pin must be left open during normal operation.
7. Do not change the setting on the MODE SELECT pin (pin 28) when the IC in self test mode. System operation is not guaranteed if this setting is
changed.
No. 4659-30/34
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