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參數資料
| 型號： | LC78628 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 數字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點 DSP |
| 文件頁數： | 9/40頁 |
| 文件大?。?/td> | 241K |
| 代理商： | LC78628 |
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No. 6329-9/40
LC78628E
Pin Functions
Pin No.
Pin
I/O
Function
1
DEFI
I
Defect detection signal (DEF) input (Must be connected to 0 V if unused.)
2
TAI
I
Test input. A pull-down resistor is built in. This pin must be connected to 0 V.
3
PDO
O
External VCO control phase comparator output
4
VV
SS
I
SET
VV
DD
FR
—
PLL-related pins
Internal VCO ground. This pin must be connected to 0 V.
5
AI
PDO output current adjustment resistor connection
6
—
Internal VCO power supply. 5 V system
7
AI
VCO frequency range adjustment resistor connection
8
V
SS
V
SS
EFMO
—
Ground. This pin must be connected to 0 V.
9
—
Ground. This pin must be connected to 0 V.
10
O
Slice level control
EFM signal output
11
EFMIN
I
EFM signal input
12
TEST2
I
Test input. A pull-down resistor is built in. This pin must be connected to 0 V.
13
CLV
+
O
Spindle control servo outputs. CLV
+
outputs a high level for accelerate, and CLV
–
outputs a high level for decelerate.
A command is provided to set these pins to three-state output.
14
CLV
–
O
15
V/P
O
Automatic rough servo/phase control switching monitor output. A high level indicates rough servo and a low level indicates
phase control.
16
V
DD
—
5 V system power supply
17
P4
I/O
General-purpose I/O port. If unused, this port must either be set to input mode and connected to the 0 V level, or be set to
output mode and left open.
General-purpose I/O command identification. A pull-down resistor is built in.
High: Only general-purpose I/O port commands can be used for control
Low: All commands can be used for control.
18
PCCL
I
19
HFL
I
Track detection signal input. This is a Schmitt input.
20
TES
I
Tracking error signal input. This is a Schmitt input.
21
PCK
O
EFM data reproduction clock monitor output. Outputs 4.3218 MHz when the phase is locked.
Synchronizing signal output.
Outputs a high level if the synchronizing signal detected from the EFM signal and the internally generated synchronizing
signal match.
22
FSEQ
O
23
TOFF
O
Tracking off state output
24
TGL
O
Tracking gain switching output. A low level output raises the gain.
25
HDCD
O
HDCD identification output. High: An HDCD disc is being played, Low: A normal disc is being played.
26
TEST3
I
Test input. A pull-down resistor is built in. This pin must be connected to 0 V.
27
V
DD
3V
—
3 V system power supply
28
JP
+
O
Track jump outputs.
JP
+
:
A high level indicates either acceleration during a jump towards outer tracks, or deceleration during a jump towards inner tracks.
JP
–
:
A high level indicates either acceleration during a jump towards inner tracks, or deceleration during a jump towards outer tracks.
A command is provided to set these pins to three-state output.
29
JP
–
O
30
16M
O
16.9344 MHz clock output
31
TEST4
I
Test input. A pull-down resistor is built in. This pin must be connected to 0 V.
Deemphasis monitor output/input. A high level is output during playback of a deemphasis disc. When external data is applied
to the HDCD filter engine, this pin is used for deemphasis switching. After a reset, this pin goes to monitor output mode in the
high-impedance state.
32
EMPH
I/O
33
LRCKO
O
HDCD filter engine output word clock (8fs) or L/R clock output from the HDCD decoder (1fs).
34
DFORO
O
HDCD filter engine output right channel data (8fs)
35
DFOLO
O
HDCD filter engine output left channel data (8fs) or L/R data output from the HDCD decoder (1fs).
36
DACKO
O
HDCD filter engine output bit clock (8fs) or HDCD decoder output bit clock (1fs).
Analog output stage gain indicator
In internal gain scaling mode, this pin always outputs a high level (unused). Gain scaling is performed internally. Normal discs
are –6 dB. When external gain scaling is used, peak extend should be turned on when this pin is high, and should be turned
off when this output is low.
37
GAIN
O
38
P0
I/O
General-purpose I/O port. If unused, this port must either be set to input mode and connected to the 0 V level, or be set to
output mode and left open.
39
P1
I/O
General-purpose I/O port. If unused, this port must either be set to input mode and connected to the 0 V level, or be set to
output mode and left open.
40
P2
I/O
General-purpose I/O port. If unused, this port must either be set to input mode and connected to the 0 V level, or be set to
output mode and left open.
41
P3
I/O
General-purpose I/O port. If unused, this port must either be set to input mode and connected to the 0 V level, or be set to
output mode and left open.
Continued on next page.
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