參數(shù)資料
型號(hào): LC78628
廠商: Sanyo Electric Co.,Ltd.
元件分類: 數(shù)字信號(hào)處理
英文描述: 16-bit fixed point DSP with Flash
中文描述: 具有閃存的 16 位定點(diǎn) DSP
文件頁(yè)數(shù): 15/40頁(yè)
文件大小: 241K
代理商: LC78628
No. 6329-15/40
LC78628E
Code
Command
RES = low
$C5
Internal braking: on
$C4
Internal braking: off
G
G
$A3
Internal braking: control
$CB
Internal braking continuous mode
$CA
Reset continuous mode
G
G
$CD
Internal braking TON mode
$CC
Reset TON mode
G
G
Issuing the internal braking on ($C5) command sets the LC78628E to internal brake mode. In this mode, the disc deceleration state can be monitored from
the WRQ pin when a brake command ($06) is executed.
In this mode the disc deceleration state is determined by counting the EFM signal density in a single frame, and when the EFM signal count falls under four,
the CLV
pin is dropped to low. At the same time the WRQ signal, which functions as a brake completion monitor, goes high. When the microprocessor
detects a high level on the WRQ signal, it should issue a STOP command to fully stop the disc. In internal braking continuous mode, the CLV
pin high-
level output braking operation continues even after the WRQ brake completion monitor goes high. Note that if errors occur in deceleration state
determination due to noise in the EFM signal, the problem can be rectified by changing the EFM signal count from four to eight with the internal brake
control command ($A3).
In internal braking TON mode ($CD), the TOFF pin is held low during internal braking operations. We recommend using this feature, since it is effective at
preventing incorrect detection at the disc mirror surface.
Notes: 1. If focus is lost during the execution of an internal brake command, the pickup must first be refocused and then the internal brake command must be
reissued.
2. Since incorrect state determination is possible depending on the EFM signal playback state (e.g., disc defects, access in progress), we recommend
using these functions in combination with a microprocessor.
Internal brake modes
WRQ
CLV–
Disc motor
braking ($06)
EFM signal
CLV+
A12811
Code
Command
RES = low
$22
New track count mode (using the TES/HFL combination)
G
G
$23
Previous track count mode (directly counts the TES signal)
The earlier track count function used the TES signal directly as the internal track counter clock.
To reduce counting errors resulting from noise on the rising and falling edges of the TES signal, the new track count function prevents noise induced errors
by using the combination of the TES and HFL signals, and implements a more reliable track count function. However, dirt and scratches on the disc can still
result in HFL signal dropouts that may result in missing track count pulses. Thus care is required when using this function.
7. Track jump — Pin 19: HFL, pin 20: TES, pin 23: TOFF, pin 24: TGL, pin 28: JP
+
, pin 29: JP
Track counting types
The LC78628E supports the two track count modes listed below.
相關(guān)PDF資料
PDF描述
LC78628E 16-bit fixed point DSP with Flash
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