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參數(shù)資料
| 型號： | LC78628 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點(diǎn) DSP |
| 文件頁數(shù)： | 30/40頁 |
| 文件大?。?/td> | 241K |
| 代理商： | LC78628 |
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No. 6329-30/40
LC78628E
Flag bit allocation in the register
Flag
Function
After a reset
EXSCA
(bit 0)
0
The 6 dB gain scaling operation is performed internally.
G
G
1
The 6 dB gain scaling operation is performed externally. The GAIN output pin is used.
XDSEL
(bit 1)
0
Data from the HDCD decoder block is applied to the HDCD filter block.
G
G
1
Data input from the LRCKI, BCKI, and DATAI pins is applied to the HDCD filter block.
1FSOUT
(bit 2)
0
Data from the HDCD filter block is output from the LRCKO, DACKO, DFOLO, and DFORO pins. (8 fs)
G
G
1
Data from the HDCD decoder block is output from the LRCKO, DACKO, DFOLO, and DFORO pins. (1 fs)
Reserved
(bit 3)
—
This flag must always be set to 0.
—
SPDHDCD
(bit 4)
0
Pre-HDCD processing 16-bit data read out from the disc is output from the DOUT pin.
G
G
1
The 20-bit data from the HDCD decode block is output from the DOUT pin.
Reserved
(bit 5)
—
This flag must always be set to 0.
—
DIN16
(bit 6)
0
The data input to the DATAI pin has a bit length of 20 bits.
G
G
1
The data input to the DATAI pin has a bit length of 16 bits.
EMPHONEN
(bit 7)
0
The EMPH pin output is disabled (high impedance).
G
G
1
The EMPH pin output is enabled (monitor data is output).
18. General-purpose I/O ports — Pin 38: P0, pin 39: P1, pin 40: P2, pin 41: P3, pin 17: P4, pin 18: PCCL
The LC78628E provides 5 I/O ports. These are set to input mode after a reset. Unused I/O port pins must either be set
to input mode and conntected to ground or set to output mode and left open.
Applications can use the PORT READ command to read out the port information, the HDCD signal and the GAIN signal
in the order P0 to P4, HDCD, GAIN from the SQOUT pin in synchronization with the falling edge of the CQCK signal.
This command has a 1-byte command format.
Only those commands related to the general-purpose ports and the HDCD control register can be used during track
check, track jump, and internal motor braking operations by setting the PCCL pin. To use these commands during a track
check or other operation, the application must set the PCCL pin high. (When the PCCL pin is high, the LC78628E will
not accept commands other than those mentioned above.) The application must set the PCCL pin low before applying
any other command. However, note that if commands are applied during a track check or other operation when the PCCL
pin is low, that operation will be interrupted. These high and low levels must be applied to the PCCL pin when the RWC
pin is at the low level.
Code
Command
RES = low
$DD
PORT READ
$DB
PORT I/O SET
PORT I SET
$DC
PORT OUTPUT SET
1
0
1
1
1
0
1
1
MSB
LSB
P0
P1
P2
P3
P4
HDCD GAIN
A12832
COIN
CQCK
RWC
SQOUT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC78628E | 16-bit fixed point DSP with Flash |
| LC78630 | 16-bit fixed point DSP with Flash |
| LC78630E | 16-bit fixed point DSP with Flash |
| LC78631 | 16-bit fixed point DSP with Flash |
| LC78631E | 16-bit fixed point DSP with Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC78628E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disc Player DSP with Built-in HDCD Decoder |
| LC7863 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:DIGITAL SIGNAL PROCESSOR FOR COMPACT DISC PLAYERS |
| LC78630 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
| LC78630E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
| LC78631 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
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