參數(shù)資料
型號(hào): LC78628
廠(chǎng)商: Sanyo Electric Co.,Ltd.
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: 16-bit fixed point DSP with Flash
中文描述: 具有閃存的 16 位定點(diǎn) DSP
文件頁(yè)數(shù): 19/40頁(yè)
文件大?。?/td> 241K
代理商: LC78628
No. 6329-19/40
LC78628E
Code
Command
RES = low
$F0
Track check in
$F8
Track check out
$FF
Two-byte command reset
G
G
The LC78628E will count exactly one more than the specified number of tracks when the microprocessor sends an arbitrary binary value in the range 8 to
254 after issuing either a track check in or a track check out command.
Notes: 1. When the desired track count has been input in binary, the track check operation is started by the fall of RWC.
2. During a track check operation the TOFF pin goes high and the tracking loop is turned off. Therefore, feed motor forwarding is required.
3. When a track check in/out command is issued the function of the WRQ signal switches from the normal mode subcode Q standby monitor function
to the track check monitor function. This signal goes high when the track check is half completed, and goes low when the check finishes. The
control microprocessor should monitor this signal for a low level to determine when the track check completes.
4. If a two-byte reset command is not issued, the track check operation will repeat. That is, to skip over 20,000 tracks, issue a track check 199
command once, and then count the WRQ signal 100 times. This will check 20,000 tracks.
5. After performing a track check operation, use the brake command to have the pickup lock onto the track.
8. Error flag output — Pin 58: EFLG, pin 62: FSX
The FSX signal is a 7.35 kHz frame sync signal generated by dividing the crystal oscillator clock. The error correction
state for each frame is output from EFLG. While FSX is low, EFLG indicates the C1 correction and while FSX is high it
indicates the C2 correction. The playback OK/NG state can be easily determined from the number of high level pulses
that appear here.
The FSX and EFLG pins can be held at the low level by applying an FSX, TEST6, EFLG, LO command ($0A).
Applying an FSX, TEST6, EFLG, EN command ($0B) returns the IC to the original output mode.
Track check mode
Two-byte command reset
($FF)
Falls to low when the track
check completes.
Rises at 1/2 the specified
track count
Input of the desired
number of tracks
minus 1 in binary
Track check in/out
command
($F0 or $F8)
RWC
WRQ
Track count
Command
Brake command
($8C)
A12816
C1
Single
correction
Double
correction
Correction
not possible
No errors
EFLG
FSX
C2
A12817
相關(guān)PDF資料
PDF描述
LC78628E 16-bit fixed point DSP with Flash
LC78630 16-bit fixed point DSP with Flash
LC78630E 16-bit fixed point DSP with Flash
LC78631 16-bit fixed point DSP with Flash
LC78631E 16-bit fixed point DSP with Flash
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LC78628E 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:Compact Disc Player DSP with Built-in HDCD Decoder
LC7863 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:DIGITAL SIGNAL PROCESSOR FOR COMPACT DISC PLAYERS
LC78630 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:Compact Disk Player DSP
LC78630E 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:Compact Disk Player DSP
LC78631 制造商:SANYO 制造商全稱(chēng):Sanyo Semicon Device 功能描述:Compact Disk Player DSP