參數(shù)資料
型號(hào): LC78625
廠商: Sanyo Electric Co.,Ltd.
元件分類: 數(shù)字信號(hào)處理
英文描述: SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
中文描述: SigmaDSP的28-/56-Bit音頻處理器雙ADC和4個(gè)DAC
文件頁數(shù): 18/35頁
文件大小: 440K
代理商: LC78625
No. 5502-18/35
LC78625E
Track jump modes
The table lists the relationships between acceleration pulses, deceleration pulses, and the braking period.
Note
:*
Applications can select whether or not a braking period (period C) is present. Code $F6 selects operation without a braking period, and code $7F
selects operation with a 60-ms braking period. The LC78625E defaults to no braking period operation after a reset.
*
As indicated in the table, actuator signals are not output during the 256 TRACK CHECK function. This is a mode in which the TES signal is counted in
the tracking loop off state. Therefore, feed motor forwarding is required.
*
The servo command register is automatically reset after one cycle of the track jump sequence (a, b, c) completes.
*
If another track jump command is issued during a track jump operation, the contents of that new command will be executed immediately.
*
The 1 TRACK JUMP #3 and 2 TRACK JUMP modes (the earlier modes) do not have a braking period (the C period). Since brake mode must be
generated by an external circuit, care is required when using this mode.
Item
Previous Track Jump Mode
New Track Jump Mode
a
b
c
a
b
c
1 TRACK JUMP IN (OUT) #1
233 μs
233 μs
60 ms
233 μs
233 μs
60 ms
1 TRACK JUMP IN (OUT) #2
0.5 track jump
period
233 μs
60 ms
0.5 track jump
period
0.5 track jump
period
60 ms
1 TRACK JUMP IN (OUT) #3
0.5 track jump
period
233 μs
This period does
not exist.
0.5 track jump
period
0.5 track jump
period
This period does
not exist.
1 TRACK JUMP IN (OUT) #4
0.5 track jump
period
233 μs
60 ms; TOFF is low
during the C period.
0.5 track jump
period
0.5 track jump
period
60 ms; TOFF is low
during the C period.
2 TRACK JUMP IN (OUT)
None
1 track jump
period
1 track jump
period
See note.
4 TRACK JUMP IN (OUT)
2 track jump
period
466 μs
60 ms
2 track jump
period
2 track jump
period
60 ms
16 TRACK JUMP IN (OUT)
9 track jump
period
7 track jump
period
60 ms
9 track jump
period
9 track jump
period
60 ms
32 TRACK JUMP IN (OUT)
18 track jump
period
14 track jump
period
60 ms
18 track jump
period
14 track jump
period
60 ms
64 TRACK JUMP IN (OUT)
36 track jump
period
28 track jump
period
60 ms
36 track jump
period
28 track jump
period
60 ms
128 TRACK JUMP IN (OUT)
72 track jump
period
56 track jump
period
60 ms
72 track jump
period
56 track jump
period
60 ms
TOFF goes high during the period
when 256 tracks are passed over.
The a and b pulses are not output.
TOFF goes high during the period
when 256 tracks are passed over.
The a and b pulses are not output.
256 TRACK CHECK
60 ms
60 ms
TRACK JUMP BRAKE
There are no a and b periods.
60 ms
There are no a and b periods.
60 ms
When the LC78625E is used in combination with an LA9230/40 Series LSI, since the THLD signal is generated by the
LA9230/40, the THLD pin (pin 25) will be unused, and should be left open.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LC78625E 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disc Player DSP
LC78626 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:DSP for Compact Disk Players
LC78626E 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:DSP for Compact Disk Players
LC78626KE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD-Player Processor/Controller
LC78628 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disc Player DSP with Built-in HDCD Decoder