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參數資料
| 型號： | LC749450NW |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Silicon Gate CMOS IC Digital RGB Image Processor IC |
| 中文描述： | 硅柵CMOS集成電路數字RGB圖像處理器芯片 |
| 文件頁數： | 9/17頁 |
| 文件大?。?/td> | 81K |
| 代理商： | LC749450NW |
No.8096-9/17
LC749450NW
Pin No.
Symbol
I/O circuit type
I/O
Circuit type
P
I
I
I
I
I
I
I
I
I
I
P
P
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
P
P
I
I
I
I
I
I
I
I
I
I
P
P
P
P
P
P
I
I
I
I
I
I
I
I
Connected to
Notes
1
2
3
4
5
6
7
8
9
DV
SS
33
CRI0
CRI1
CRI2
CRI3
CRI4
CRI5
CRI6
CRI7
CRI8
CRI9
DV
DD
18
DV
SS
18
YIN0
YIN1
YIN2
YIN3
YIN4
YIN5
YIN6
YIN7
YIN8
YIN9
TSTI0
DHS
TSTI1
DVS
TSTI2
CLKI
DCLKI
DEHI
TSTI3
TSTI4
XTAL
XRST
DV
DD
18
DV
SS
18
CBI0
CBI1
CBI2
CBI3
CBI4
CBI5
CBI6
CBI7
CBI8
CBI9
DPV
DD
18
DPV
SS
18
AV
DD
33
AV
SS
33
DV
DD
33
DV
SS
33
GP_ADR0
GP_ADR1
GP_ADR2
GP_ADR3
GP_ADR4
GP_ADR5
GP_ADR6
GP_ADR7
—
GND
3.3 V system ground
PHICD
Digital interface
Cr/R signal input
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
—
—
Power supply
GND
1.8 V system power supply
1.8 V system ground
PHICD
Digital interface
Y/G signal input
RT.656 input
PHICD
PHICD
PHICD
PHICD
PHISD
PHIC
PHIC
PHICD
PHISD
PHICD
PHIC
PHIS
—
—
Open
Test input. This pin is normally left open.
Horizontal sync signal (The polarity can be switched.)
Test input. This pin is normally left open.
Vertical sync signal (The polarity can be switched.)
Test input. This pin is normally left open.
System clock
System clock
Valid video period enable signal input
Test input. This pin is normally left open.
Test input. This pin is normally left open.
Fixed clock connection
System reset (Reset on a low-level input)
1.8 V system power supply
1.8 V system ground
Open
Open
Open
Open
Initialization circuit
Power supply
GND
PHICD
Digital interface
Cb/B signal input
—
—
—
—
—
—
Power supply
GND
Power supply
GND
Power supply
GND
PLL 1.8 V digital system power supply
PLL 1.8 V digital system ground
PLL 3.3 V analog system power supply
PLL 3.3 V analog system ground
3.3 V system power supply
3.3 V system ground
PHICD
CPU address input or
Test mode subsidiary setting inputs
Pin Listing
Continued on next page.
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