參數(shù)資料
型號(hào)： LC72710LW
廠商： Sanyo Electric Co.,Ltd.
英文描述： Mobile FM Multiplex Broadcast (DARC) Receiver IC with On-Chip VICS Decoder(移動(dòng)FM多路廣播接收器芯片帶片上VICS譯碼器)
中文描述： 移動(dòng)調(diào)頻多路廣播（DARC）接收器集成電路片VICS解碼器（移動(dòng)調(diào)頻多路廣播接收器芯片帶片上VICS譯碼器）
文件頁數(shù)： 19/33頁
文件大?。?/td> 168K
代理商： LC72710LW
Data Output (Post-correction data output)
The IC outputs packet data to which error correction processing has bee applied. The application inputs the CCB address
#FB to DI.
No. 6166-19/33
LC72710W, 72710LW
*
: The DO pin is normally left open.
Since the DO pin is an n-channel open-drain output, the data change time from a low-level
output to a high-level output differs due to the pull-up resistor.
t
EL
t
DDO
t
ES
t
CL
t
CH
t
HD
t
SU
A3
DO287
DO286
DO285
DO2
DO1
DO0
A2
A1
A0
B3
B2
B1
B0
DI
DO
CL
CE
CRC4 pin output after N items
have been transferred.
Note: The number of items, N, refers to
the number of 8-bit items.
t
EL
t
EH
t
ES
t
CL
t
CRC
t
CH
t
HD
t
SU
A3
N
N-1
N-2
CR2
CR1
CR0
A2
A1
A0
B3
B2
B1
B0
DI
CRC4 pin output
CL
CE
Structure of the Post-Correction Output Data <CCB Interface>
Post-error correction data can be output by using CCB address #FB. Although there are up to 288 bits of valid data that
can be output, it is possible to stop clock input (CL input) and set CE to the low level, and output the remaining data on
the next interrupt with no harmful effects whatsoever.
The maximum amount of data that can be output is 288 bits (36 bytes), and the contents of the status register (STAT)
and the block number register (BLNO) are added as the first two bytes.
The contents of the STAT and BLNO registers are output LSB first.
The post-correction data is output in order starting with the first bit in each single block of data.
The BIC code is not output.
The values of the output data are not guaranteed if multiple data read operations are performed for a single interrupt
signal (INT).
Layer 4 CRC Check Circuit <CCB Interface>
The basic outline of this operation is the same as that described in the Layer 4 CRC Detection Circuit <Parallel
Interface> section earlier in this document. The data group data used for this error detection operation is sent to the IC
using the CCB interface. The value #FC is used as the CCB address.
The data group data is transferred in 8-bit units. There is no upper limit on the amount of data that can be transferred (the
value N in the figure below), and the data transfer may be divided into multiple operations.
STAT (8 bits)
BLNO (8 bits)
Data section (176 bits) Post-error correction data
Layer 2 CRC (14 bits)
Parity (82 bits)
DO0 to DO7
DO8 to DO15
DO16 to DO191
DO192 to DO205
DO206 to DO287
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LC72710W 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC with On-Chip VICS Decoder
LC72711LW 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC
LC72711LW-E 制造商:ON Semiconductor 功能描述:DARC DECODE-LSI - Trays
LC72711LWHS-E 功能描述:射頻接收器 RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel
LC72711W 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC
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