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參數資料
| 型號： | LC72710LW |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Mobile FM Multiplex Broadcast (DARC) Receiver IC with On-Chip VICS Decoder(移動FM多路廣播接收器芯片帶片上VICS譯碼器) |
| 中文描述： | 移動調頻多路廣播（DARC）接收器集成電路片VICS解碼器（移動調頻多路廣播接收器芯片帶片上VICS譯碼器） |
| 文件頁數： | 14/33頁 |
| 文件大?。?/td> | 168K |
| 代理商： | LC72710LW |
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No. 6166-14/33
LC72710W, 72710LW
Valid
output
RD
RDY
timing 1
RDY
timing 2
DATn
RDY Signal Output Timing
This is the data group write register used for the layer 4 CRC check. It is used only when the parallel interface is used.
Applications should specify the dedicated CCB address when using the serial interface.
Layer 4 CRC Register
Address
Register
R/W
Initial value
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
06H
CRC4
W
00H
(LSB)
*
: BIT0 is unused.
VH
0: Indicates data for which only horizontal correction was performed.
1: Indicates data for which after horizontal correction, vertical and then second horizontal correction were performed as
well.
BLK
0: Indicates data that was received with block synchronization unsynchronized.
1: Indicates data that was received with block synchronization synchronized.
FRM
0: Indicates data that was received with frame synchronization unsynchronized.
1: Indicates data that was received with frame synchronization synchronized.
ERR
0: Indicates data for which error correction completed and no errors were detected in the level 2 CRC check.
1: Indicates data for which error correction was not possible or for which errors were detected in the level 2 CRC
check.
PRI
0: Indicates data that was inferred to be data block data by the frame synchronization circuit.
1: Indicates data that was inferred to be parity block data by the frame synchronization circuit.
HEAD
0:
1: Indicates data that was inferred to be in the frame head block by the frame synchronization circuit.
This flag is valid only when VH is 0.
CRC4
0: Indicates that the layer 4 CRC detection circuit division registers were not all zeros.
1: Indicates that the layer 4 CRC detection circuit division registers were all zeros, i.e. that there were no errors.
The result at the point immediately prior to register readout is loaded into this flag.
Status Register
Address
Register
R/W
Initial value
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
01H
STAT
R
—
VH
BLK
FRM
ERR
PRI
HEAD
CRC4
*
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LC72710W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC with On-Chip VICS Decoder |
| LC72711LW | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC |
| LC72711LW-E | 制造商:ON Semiconductor 功能描述:DARC DECODE-LSI - Trays |
| LC72711LWHS-E | 功能描述:射頻接收器 RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel |
| LC72711W | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Mobile FM Multiplex Broadcast DARC Receiver IC |
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