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Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Note: 1. Applies to open drain output specification pins. The rating from the “other pin” entry applies for specifications other than the open drain output
specification.
2. Levels up to the free-running oscillation level are allowed for the oscillator input and output pins.
3. Inflow current
4. Outflow current (Applies to the pull-up output specification and CMOS output specification pins.)
5. We recommend using reflow soldering methods to mount the QFP package version.
Contact your Sanyo sales representative to discuss process conditions if techniques in which the whole package is immersed in a solder bath
(solder dip or spray techniques) are used.
Allowable Operating Ranges
at Ta = –30 to + 70°C, V
SS
= 0 V, V
DD
= 3.0 to 5.5 V unless otherwise specified
Note: 1. Applies to open drain specification pins. However, the rating for V
IH
(2) applies to the P33/HOLD pin. Ports P2, P3 and P6 cannot be used as input
pins when CMOS output specifications are used.
2. Applies to open drain specification pins.
3. When PE is used as a three-value input, V
IH
(4), V
IM
and V
IL
(4) apply. Port P3 cannot be used as input pins when CMOS output specifications
are used.
No. 4677-7/23
LC66354B, 66356B, 66358B
Parameter
Symbol
Applicable pins, notes
Conditions
Ratings
Unit
Note
Maximum supply voltage
V
DD
max
V
IN
(1)
V
IN
(2)
V
OUT
(1)
V
OUT
(2)
V
DD
P2, P3 (except for the P33/HOLD pin), P4, P5, P6
–0.3 to +7.0
V
Input voltage
–0.3 to +15.0
V
1
Other inputs
–0.3 to V
DD
+ 0.3
–0.3 to +15.0
V
2
Output voltage
P2, P3 (except for the P33/HOLD pin), P4, P5, P6
V
1
Other outputs
–0.3 to V
DD
+ 0.3
V
2
I
ON
P0, P1, P2, P3 (except for the P33/HOLD pin),
P4, P5, P6, PC
20
mA
3
Output current per pin
–I
OP
(1)
–I
OP
(2)
Σ
I
ON
(1)
Σ
I
ON
(2)
Σ
I
OP
(1)
Σ
I
OP
(2)
P0, P1, P4, P5
2
mA
4
P2, P3 (except for the P33/HOLD pin), P6, PC
4
mA
4
P0, P1, P2, P3, (except for the P33/HOLD pin), P40, P41
75
mA
3
Total pin current
P5, P6, P42, P43, PC
75
mA
3
P0, P1, P2, P3 (except for the P33/HOLD pin), P40, P41
25
mA
4
P5, P6, P42, P43, PC
25
mA
4
Allowable power dissipation
Pd max
Ta = –30 to +70°C
DIP42S
600
mW
QFP48E
430
mW
5
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–55 to +125
°C
Parameter
Symbol
Applicable pins
Conditions
Ratings
Unit
Note
min
typ
max
Operating supply voltage
V
DD
V
DD
(H)
V
DD
V
DD
P2, P3 (except for
the P33/HOLD pin),
P4, P5, P6
0.92
≤
Tcyc
≤
10 μs
In HOLD mode
3.0
5.5
V
Memory hold supply voltage
1.8
5.5
V
With the output n-channel
transistor off
V
IH
(1)
0.8 V
DD
13.5
V
1
Input high level Voltage
V
IH
(2)
P33/HOLD, RES, OSC1
With the output n-channel
transistor off
0.8 V
DD
V
DD
V
2
V
IH
(3)
P0, P1, PC, PD, PE
With the output n-channel
transistor off
0.75 V
DD
V
DD
V
3
V
IH
(4)
V
IM
V
CMM
(1)
V
CMM
(2)
PE
Using three-value input
0.8 V
DD
0.4 V
DD
V
DD
V
Middle level input voltage
PE
Using three-value input
0.6 V
DD
V
DD
V
DD
– 1.5
V
Common mode input
voltage range
PD0, PC2
Using comparator input
1.5
V
PD1, PD2, PD3, PC3
V
SS
V
P2, P3 (except for
the P33/HOLD pin),
P5, P6, RES, OSC1
With the output n-channel
transistor off
V
IL
(1)
0.2 V
DD
V
1
Input low level voltage
V
IL
(2)
P33/HOLD
V
DD
= 1.8 to 5.5 V
With the output n-channel
transistor off
0.2 V
DD
V
V
IL
(3)
P0, P1, P4, PC, PD, PE,
TEST
V
SS
0.25 V
DD
V
3
V
IL
(4)
f
OP
(T
CYC
)
PE
Using comparator input
V
SS
0.4
(10)
0.2 V
DD
4.35
(0.92)
V
Operating frequency
(instruction cycle time)
MHz
(μs)
Continued on next page.