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參數(shù)資料
| 型號： | LC66358B |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Four-bit Single-Chip Microcontrollers On-Chip 8 K-byte ROM(4位單片微控制器(帶8K字節(jié)片上ROM)) |
| 中文描述： | 四位單芯片微控制器片8的K -字節(jié)的光盤（4位單片微控制器（帶8K的字節(jié)片上光盤）） |
| 文件頁數(shù)： | 18/23頁 |
| 文件大小： | 267K |
| 代理商： | LC66358B |
Continued from preceding page.
Note: 4. ZF is set according to the result of incrementing DP
L
or DP
Y
.
5. ZF is set according to the result of decrementing DP
L
or DP
Y
.
6. ZF is set according to the result of incrementing DP
L
or DP
Y
.
7. ZF is set according to the result of decrementing DP
L
or DP
Y
.
No. 4677-18/23
LC66354B, 66356B, 66358B
Mnemonic
Instruction code
Operation
Description
Affected
status bits
Note
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Load the contents of M (reg)
into AC. (The reg is either HL
or XY.) Then increment the
contents of either DP
L
or DP
Y
. ZF
The relationship between t0
and reg is the same as that
for the LA reg instruction.
Load AC from
M (reg) then
increment reg
AC
←
[M (reg)]
DP
L
←
(DP
L
) + 1
or DP
Y
←
(DP
Y
) + 1
LA reg, I
0
1
0
0
1
0
t
0
1
1
2
4
Load the contents of M (reg)
into AC. (The reg is either HL
or XY.) Then decrement the
contents of either DP
L
or DP
Y
. ZF
The relationship between t
0
and reg is the same as that
for the LA reg instruction.
Load AC from
M (reg) then
decrement reg
AC
←
[M (reg)]
DP
L
←
(DP
L
) – 1
or DP
Y
←
(DP
Y
) – 1
LA reg, D
0
1
0
1
1
0
t
0
1
1
2
5
Exchange the contents of
M (reg) and AC. The reg is
either HL or XY depending
on t
0
.
Exchange AC
with M (reg)
XA reg
0
1
0
0
1
1
t
0
0
1
1
(AC)
[M (reg)]
Exchange the contents of
M (reg) and AC. (The reg is
either HL or XY.) Then
increment the contents of
either DP
L
or DP
Y
. The
relationship between t0 and
reg is the as that for the XA
reg instruction.
Exchange AC
with M (reg) then
increment reg
(AC)
[M (reg)]
DP
L
←
(DP
L
) + 1
or DP
Y
←
(DP
Y
) + 1
XA reg, I
0
1
0
0
1
1
t
0
1
1
2
ZF
6
Exchange the contents of
M (reg) and AC. (The reg is
either HL or XY.) Then
decrement the contents of
either DP
L
or DP
Y
. The
relationship between t0 and
reg is the as that for the XA
reg instruction.
Exchange AC
with M (reg) then
decrement reg
(AC)
[M (reg)]
DP
L
←
(DP
L
) – 1
or DP
Y
←
(DP
Y
) – 1
XA reg, D
0
1
0
1
1
1
t
0
1
1
2
ZF
7
XADR i8
Exchange AC
with M direct
1
I
7
1
I
7
1
I
6
1
I
6
0
I
5
0
I
5
0
I
4
0
I
4
1
I
3
0
I
3
0
I
2
1
I
2
0
I
1
1
I
1
0
I
0
0
I
0
2
2
(AC)
[M (i8)]
Exchange the contents of AC
with M (i8).
LEAI i8
Load E & AC with
immediate data
2
2
E
←
I
7
I
6
I
5
I
4
AC
←
I
3
I
2
I
1
I
0
Load the immediate data i8
into E, AC.
Load into E, AC the ROM
data at the location
determined by replacing the
lower 8 bits of the PC with
E, AC.
Read table data
from program
ROM
E, AC
←
[ROM (PCh, E, AC)]
RTBL
0
1
0
1
1
0
1
0
1
2
Read table data
from program
ROM then output
to P4, 5
Output from ports 4 and 5 the
ROM data at the location
determined by replacing the
lower 8 bits of the PC with
E, AC.
Port 4, 5
←
[ROM (PCh, E, AC)]
RTBLP
0
1
0
1
1
0
0
0
1
2
I
g
N
b
N
c
L
reg
t
0
0
1
HL
XY
Continued on next page.
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