
LC6527N/F/L, LC6528N/F/L
No. 4363-37/43
Notes for Standby Function Application
The LC6527N/F/L, 6528N/F/L provide the standby function called HALT mode to minimize the current dissipation when the
program is in the wait state.
The standby function is controlled by the HALT instruction, PA pin, RES pin.
A peripheral circuit and program must be so designed as to provide precise control of the standby function. In most applications
where the standby function is performed, voltage regulation, instantaneous break of power, and external noise are not negligible.
When designing an application circuit and program, whether or not to take some measures must be considered according to the
extent to which these factors are allowed. This section mainly describes power failure backup for which the standby function is
mostly used. A sample application circuit where the standby function is performed precisely is shown below and notes for circuit
design and program design are also given below.
When using the standby function, the application circuit shown below must be used and the notes must be also fully observed.
If any other method than shown in this section is applied, it is necessary to fully check the environmental conditions such as power
failure and the actual operation of application equipment.
1.
HALT mode release conditions
The HALT mode setting, release conditions are shown in Table 1.
Table 1 HALT mode setting, release conditions
HALT mode setting conditions
HALT mode release conditions
HALT instruction
Provided that PA
3
is at high level.
1
Reset (Low level is applied to RES.)
2
Low level is applied to PA
3
.
Note)
HALT mode release condition
2
is available only when the RC mode is used for
system clock generation; and unavailable when the ceramic resonator mode is used
because the OSC circuit may not operate normally.
2.
Proper cares in using standby function
When using the standby function, an application circuit and program must be designed with the following in mind.
(1) The supply voltage at the standby state must not be less than specified.
(2) Input timing and conditions of each control signal (RES, PA
3
) must be observed at the standby initiate/release state.
(3) Release operation must not be overlapped at the time of execution of the HALT instruction.
A sample applicastion where the standby function is used for power failure backup is shown below as a concrete method to
observe these notes. A sample application circuit, its operation, and notes for program design are given below.
Sample application where the standby function is used for power failure backup.
Power failure backup is an application where power failure of the main power source is detected and the HALT instruction is
executed to cause the standby state to be entered. The power dissipation is minimized and a backup capacitor is used to retain
the contents of the internal registers for a certain period of time. After power is restored, a reset occurs automatically and the
execution of the program starts at address 000H of the program counter (PC). Shown below are sample applications where the
program selects or not between power-ON reset and reset after power is restored, notes, measures for instantaneous break of
AC power.