參數(shù)資料
型號： LC651202F
廠商： Sanyo Electric Co.,Ltd.
英文描述： 4-Bit Single-Chip Microcontrollers for Small-Scale Control Applications
中文描述： 4位單片微控制器的小型規(guī)模控制中的應用
文件頁數(shù)： 33/35頁
文件大?。?/td> 312K
代理商： LC651202F
LC651204/1202 Instruction Set (by function)
Abbreviations
AC:
ACt:
CF:
CTL:
DP:
E:
EXTF: External interrupt request flag
Fn:
Flag bit n
Accumulator
Accumulator bit t
Carry flag
Control register
Data pointer
E register
M:
M(DP):
P(DPL):
PC:
STACK:
TM:
TMF:
At, Ha, La:Working registers
Memory
Memory addressed by DP
I/O port specified by DPL
Program counter
Stack pointer
Timer
Timer (internal) interrupt request flag
ZF
:
Zero flag
Indicates the contents of the item enclosed.
Transfer and direction
Addition
Subtraction
Logical AND
Logical OR
Logical exclusive OR
( )[ ]:
←
+
–
^
∨
∨
:
:
:
:
:
:
No. 5190-33/35
LC651204N/F/L, LC651202N/F/L
Instruction code
Modified
status
flags
Mnemonic
Operation
Description
Notes
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
CLA
ClC
STC
CMA
INC
DEC
Clear AC
Clear CF
Set CF
Complement AC
Increment AC
Decrement AC
1
1
1
1
0
0
1
1
1
1
0
0
0
1
1
1
0
0
0
0
1
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
0
0
0
1
1
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
AC
←
0
CF
←
0
CF
←
1
AC
←
(AC)
AC
←
(AC) + 1
AC
←
(AC) – 1
AC
←
(CF), AC
←
(AC
n
), CF
←
(AC
3
)
E
←
(AC)
(AC)
(E)
M(DP)
←
[M(DP)] + 1
M(DP)
←
[M(DP)] – 1
Clears AC.
Clears CF.
Sets CF.
Sets AC to the one's
Increments AC.
Decrements AC.
ZF
*
1
CF
CF
ZF
ZF CF
ZF CF
RAL
Rotate AC left through CF
0
0
0
0
0
0
0
1
1
1
Shifts AC together with CF left.
ZF CF
TAE
XAE
INM
DEm
Transfer AC to E
Exchange AC with E
Increment M
Decrement M
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
1
1
1
1
1
Moves the contents of AC to E.
Exchanges the contents of AC and E.
Increments M(DP).
Decrements M(DP).
Sets the bit in M(DP) specified
by B1B0 to 1.
Clears the bit in M(DP) specified
by B1B0 to 0.
Adds the contents of AC and
M(DP) as two's complement
quantities and stores the result
in AC.
Adds the contents of AC, CF,
and M(DP) as two's complement ZF CF
in AC.
Adds 6 to AC.
Adds 10 to AC.
Takes the logical exclusive OR
of AC and M(DP) and stores
the result in AC.
Takes the logical AND of AC
and M(DP) and stores the
result in AC.
Takes the logical OR of AC and
M(DP) and stores the result in AC.
Compares the contents of AC
and M(DP) and sets or clears
CF and ZF accordingly.
Magnitude relationship
[M(DP)] > (AC)
[M(DP)] = (AC)
[M(DP)] < (AC)
ZF CF
ZF CF
SmB bit
Set M data bit
0
0
0
0
1
0
B
1
B
0
1
1
M(DP, B
1
B
0
)
←
1
RMB bit
Reset M data bit
0
0
1
0
1
0
B
1
B
0
1
1
M(DP, B
1
B
0
)
←
0
AD
Add M to AC
0
1
1
0
0
0
0
0
1
1
AC
←
(AC) + [M(DP)]
ZF CF
ADC
Add M to AC with CF
0
0
1
0
0
0
0
0
1
1
AC
←
(AC) + [M(DP)]
+ (CF)
DAA
DAS
Decimal adjust AC in addition
Decimal adjust AC in subtraction
1
1
1
1
1
1
0
0
0
1
1
0
1
1
0
0
1
1
1
1
AC
←
(AC) + 3
AC
←
(AC) + 10
ZF
ZF
ZF
EXL
Exclusive or M to AC
1
1
1
1
0
1
0
1
1
1
AC
←
(AC)
∨
[M(DP)]
AND
And M to AC
1
1
1
0
0
1
1
1
1
1
AC
←
(AC) ^ [M(DP)]
ZF
OR
Or M to AC
1
1
1
0
0
1
0
1
1
1
AC
←
(AC)
∨
[M(DP)]
ZF
CM
Compare AC with M
1
1
1
1
1
0
1
1
1
1
[M(DP)] + (AC) + 1
ZF CF
Compares the contents of AC
and the immediate data I
I
I
1
I
0
and sets or clears CF and ZF
accordingly.
Magnitude relationship
I
3
I
2
I
1
I0 > (AC)
I
3
I
2
I
1
I0 = (AC)
I
3
I
2
I
1
I0 < (AC)
Cl data
Compare AC with
immediate data
0
0
0
1
1
0
0
0
1
I
3
1
I
2
0
I
1
0
I
0
2
2
I
3
I
2
I
1
I
0
+ (AC) + 1
ZF CF
CLI data
Compare DP
L
with immediate 0
data
0
1
1
0
0
1
1
I
3
1
I
2
0
I
1
0
I
0
2
2
(DP
L
)
∨
I
3
I
2
I
1
I
0
Compares the contents of DPL
and the immediate data.
Loads AC with the immediate
data I
3
I
2
I
1
I
0
.
Stores the contents of AC at M(DP).
Loads the contents of M(DP) into AC.
ZF
Exchanges the contents of AC
and M(DP). Then, replaces the
contents of DPH with (DP
H
)
∨
0
M
2
M
1
M
0
.
ZF
0
LI data
Load AC with immediate data
1
1
0
0
I
3
I
2
I
1
I
0
1
1
AC
←
I
3
I
2
I
1
I
0
ZF
*
1
S
L
Store AC to M
Load AC from M
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
1
1
1
1
1
M(DP)
←
(AC)
AC
←
[M(DP)]
Exchange AC with M then
modify DP
H
with immediate
data
1
0
1
0
0
M
2
M
1
M
0
1
2
(AC)
[M(DP)]
DP
←
(DP
H
)
∨
0 M
2
M
1
M
0
XM data
ZF
Exchanges the contents of AC
and M(DP).
X
Exchange AC with M
1
0
1
0
0
0
0
0
1
2
(AC)
[M(DP)]
ZF
Exchange AC with M then
increment DP
L
1
1
1
1
1
1
1
0
1
2
(AC)
[M(DP)]
DP
L
←
(DP
L
) + 1
Exchanges the contents of AC
and M(DP). Then, increments
the contents of DP
L
.
Exchanges the contents of AC
and M(DP). Then, Decrements
the contents of DP
L
.
Loads into AC and E the ROM
data stored at the location given
by the lower 8 bits of the PC, E
and AC.
XI
ZF
XD
Exchange AC with M then
Decrement DP
L
1
1
1
1
1
1
1
1
1
2
(AC)
[M(DP)]
DP
L
←
(DP
L
) – 1
ZF
RTBl
Read table data from
program ROM
0
1
1
0
0
0
1
1
1
2
AC, E
ROM
(PCh, E, AC)
I
A
A
L
M
i
N
ZF is set to indicate
the result of the
(DPH)
∨
0 M
2
M
1
M
0
operation.
ZF is set according
to the contents of
DPH at the point the
instruction
executed.
ZF is set to indicate
the result of the DP
L
+1 operation.
ZF is set to indicate
the result of the DP
L
–1 operation.
was
N
CF
0
1
1
ZF
0
1
0
CF
0
1
1
ZF
0
1
0
Continued on next page.
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