
L6726A
Application details
17/24
Type II compensation relies on the zero introduced by the output capacitors bank to achieve
stability. Thus, a needed condition to successfully apply type II compensation is
(usually true when output capacitor is based on electrolytic, aluminium electrolytic or
tantalum capacitor).
To define compensation network components values, the below suggestions may be
followed:
a)
Set the output resistor divider in order to obtain the desired output voltage:
Usual values of R
FB
and R
OS
ranges from some hundreds of
to some k
(consider trade-off between power dissipation on output resistor divider and offset
introduced by FB bias current).
If the desired output voltage is equal to internal reference, R
OS
has to be NC and
FB pin can be directly connected to V
OUT
.
b)
Set R
F
in order to obtain the desired closed loop regulator bandwidth according to
the approximated formula:
If V
OUT
= V
REF
, just consider (R
FB
+R
OS
)/R
OS
factor equal to 1.
c)
Place F
Z
below F
LC
(typically 0.2
·
F
LC
):
2
π
R
F
F
LC
d)
Place F
P
at 0.5
·
F
SW
:
e)
Check that compensation network gain is lower than open loop transconductance
EA gain.
Estimate phase margin obtained (it should be greater than 45°) and repeat,
modifying parameters, if necessary.
f)
8.3
Soft Start time calculation
To calculate SS time (t
SS
), the following approximated equation can be used (C
P
<<C
F
):
V
I
SS
F
ESR
F
0dB
<
R
R
OS
-----------
V
V
REF
--------------
1
–
=
R
F
F
---------------------------------
F
F
LC
V
V
IN
------------------
gm
--------
R
----------------------------
R
+
R
OS
=
C
F
--------------------------------------
=
C
P
C
C
F
π
R
F
F
SW
1
–
------------------------------------------------------------
R
F
F
SW
------------------------------------
=
t
SS
C
F
-------------------------------------------------------
--------------
V
OSC
=