- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄43899 > L5993 (STMICROELECTRONICS) 1.5 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDIP16 PDF資料下載
參數(shù)資料
| 型號： | L5993 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 1.5 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDIP16 |
| 封裝： | DIP-16 |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 200K |
| 代理商： | L5993 |
start capacitor in case of permanent fault, referred
to as ’hiccup” period, is approximately given by:
Thic
4.5
1
ISSC
+
1
ISSD
Css (7)
Since the system tries restarting each hiccup cy-
cle, there is not any latchoff risk.
”Hiccup” keeps the system in control in case of
short circuits but does not eliminate power com-
ponents overstress during pulse-by-pulse limita-
tion (from A to C). Other external protection cir-
cuits are needed if a better control of overloads is
required.
Pin 8. VCC (Controller Supply). This pin supplies
the signal part of the IC. The device is enabled as
VCC voltage exceeds the start threshold and
works as long as the voltage is above the UVLO
threshold. Otherwise the device is shut down and
the
current
consumption
is
extremely
low
(<150
A). This is particularly useful for reducing
the consumption of the start-up circuit (in the sim-
plest case, just one resistor), which is one of the
most significant contributions to power losses
when a converter is lightly loaded.
An internal Zener limits the voltage on VCC to
25V. The IC current consumption increases con-
siderably if this limit is exceeded.
A small film capacitor between this pin and SGND
(pin 12), placed as close as possible to the IC, is
recommended to filter high frequency noise.
Pin 9. VC (Supply of the Power Stage). It supplies
the driver of the external switch and therefore ab-
sorbs a pulsed current. Thus it is recommended to
place a buffer capacitor (towards PGND, pin 11,
as close as possible to the IC) able to sustain
these current pulses and in order to avoid them
inducing disturbances.
This pin can be connected to the buffer capacitor
directly or through a resistor, as shown in fig. 25,
to control separately the turn-on and turn-off
speed of the external switch, typically a Power-
MOS. At turn-on the gate resistance is Rg +Rg’, at
turn-off is Rg only.
Pin 10. OUT (Driver Output). This pin is the out-
put of the driver stage of the external power
switch. Usually, this will be a PowerMOS, al-
though the driver is powerful enough to drive
BJT’s (1.6A source, 2A sink, peak).
The driver is made up of a totem pole with a high-
side NPN Darlington and a low-side VDMOS, thus
there is no need of an external diode clamp to
prevent voltage from going below ground. An in-
ternal clamp limits the voltage delivered to the
gate at 13V. Thus it is possible to supply the
driver (Pin 9) with higher voltages without any risk
of damage for the gate oxide of the external MOS.
The clamp does not cause any additional in-
crease of power dissipation inside the chip since
the current peak of the gate charge occurs when
the gate voltage is few volts and the clamp is not
active. Besides, no current flows when the gate
voltage is 13V, steady state.
Under UVLO conditions an internal circuit (shown
in fig.26) holds the pin low in order to ensure that
the external MOS cannot be turned on acciden-
tally. The peculiarity of this circuit is its ability to
mantain the same sink capability (typically, 20mA
CC = 0V up to the start-up threshold.
When the threshold is exceeded and the L5993
starts operating, VREFOK is pulled high (refer to fig.
26) and the circuit is disabled.
It is then possible to omit the ”bleeder” resistor
(connected between the gate and the source of
the MOS) ordinarily used to prevent undesired
switching-on of the external MOS because of
some leakage current.
Pin 11. PGND (Power Ground). The current loop
during the discharge of the gate of the external
MOS is closed through this pin. This loop should
be as short as possible to reduce EMI and run
separately from signal currents return.
OUT
Rg
DRIVE &
CONTROL
13V
VC
VCC
Rg’
PGND
Rg(ON)=Rg+Rg’
Rg(OFF)=Rg
D97IN767
L5993
9
10
11
8
Figure 25. Turn-on and turn-off speeds adjust-
ment
10
12
SGND
OUT
VREFOK
D97IN538
Figure 26. Pull-Down of the output in UVLO
L5993
11/22
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L6115 | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PZFM15 |
| L6114 | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP20 |
| L6205PD | STEPPER MOTOR CONTROLLER, 5.6 A, PDSO20 |
| L6205D013TR | STEPPER MOTOR CONTROLLER, 5.6 A, PDSO20 |
| L6206D | STEPPER MOTOR CONTROLLER, 5.6 A, PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L5993D | 功能描述:開關(guān)變換器、穩(wěn)壓器與控制器 Prog Current Mode RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關(guān)頻率:1 MHz 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| L5993D013TR | 功能描述:開關(guān)變換器、穩(wěn)壓器與控制器 Prog Current Mode RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關(guān)頻率:1 MHz 工作溫度范圍: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
| L5994 | 功能描述:電流型 PWM 控制器 Adj Triple Out Pwr RoHS:否 制造商:Texas Instruments 開關(guān)頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| L5994_02 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:ADJUSTABLE TRIPLE OUTPUT POWER SUPPLY CONTROLLER |
| L5994A | 功能描述:監(jiān)控電路 ADJT TRIPLE OUTPUT POWER SUPPLY CNTLR RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。