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參數(shù)資料
| 型號： | KSZ9021GN-EVAL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 28/53頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR KSZ9021GN |
| 標準包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng)控制器（PHY 和 MAC） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ9021GN |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | 576-3789-ND - TXRX GIG ETH GMII/MII 64-QFN KSZ9021GN TR-ND - TXRX ETHERNET GB GMII/MII 64MLF 576-3635-ND - TXRX ETHERNET GB GMII/MII 64-MLF |
| 其它名稱： | 576-3873 |
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MCP434X/436X
DS22233A-page 34
2009 Microchip Technology Inc.
4.2.2.1
Status (STATUS) Register
This register contains 7 status bits. These bits show the
state of the WiperLock bits, the Write Protect bit, and if
an EEPROM write cycle is active. The STATUS register
can
be
accessed
via
the
READ
commands.
Register 4-1 describes each STATUS register bit.
The STATUS register is placed at Address 05h.
REGISTER 4-1:
STATUS REGISTER
R-1
R-0
R-x
R-1
R-x
D8:D7
WL3 (1)
WL2 (1)
EEWA
WL1 (1)
WL0 (1)
—WP (1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 8-7
D8:D7: Reserved. Forced to “1”
bit 6
WL3: WiperLock Status bit for Resistor Network 3 (Refer to Section 5.3 “WiperLock Technology”
for further information)
The WiperLock Technology bit (WL3) prevents the Volatile and Non-Volatile Wiper 3 addresses and the
TCON1 register bits R3HW, R3A, R3W, and R3B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1
=
Wiper and TCON1 register bits R3HW, R3A, R3W, and R3B of Resistor Network 3 (Pot 3) are
“Locked” (Write Protected)
0
=
Wiper and TCON1 of Resistor Network 3 (Pot 3) can be modified
Note:
The WL3 bit always reflects the result of the last programming cycle to the non-volatile WL3
bit. After a POR/BOR or RESET pin event, the WL3 bit is loaded with the non-volatile WL3
bit value.
bit 5
WL2: WiperLock Status bit for Resistor Network 2 (Refer to Section 5.3 “WiperLock Technology”
for further information)
The WiperLock Technology bit (WL2) prevents the Volatile and Non-Volatile Wiper 2 addresses and the
TCON1 register bits R2HW, R2A, R2W, and R2B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1
=
Wiper and TCON1 register bits R2HW, R2A, R2W, and R2B of Resistor Network 2 (Pot 2) are
“Locked” (Write Protected)
0
=
Wiper and TCON1 of Resistor Network 2 (Pot 2) can be modified
Note:
The WL0 bit always reflects the result of the last programming cycle to the non-volatile WL0
bit. After a POR/BOR or RESET pin event, the WL0 bit is loaded with the non-volatile WL0
bit value.
bit 4
EEWA: EEPROM Write Active Status bit
This bit indicates if the EEPROM Write Cycle is occurring.
1
=
An EEPROM Write cycle is currently occurring. Only serial commands to the Volatile memory
locations are allowed (addresses 00h, 01h, 04h, and 05h)
0
=
An EEPROM Write cycle is NOT currently occurring
Note 1:
Requires a High Voltage command to modify the state of this bit (for Non-Volatile devices only). This bit is
Not directly written, but reflects the system state (for this feature).
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| KSZ9021GQI | 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver w/ GMII/MII, I-Temp RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ9021RL | 功能描述:以太網(wǎng) IC Gigabit Ethernet Transceiver with GMII RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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