參數(shù)資料
型號： KSZ8895RQI
廠商： Micrel Inc
文件頁數(shù)： 61/119頁
文件大?。?/td> 0K
描述： IC 10/100-T 5 PORT SW 128PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
PIC16(L)F1782/3
DS41579C-page 46
Preliminary
2011-2012 Microchip Technology Inc.
REGISTER 4-2:
CONFIG2: CONFIGURATION WORD 2
R/P-1
LVP
DEBUG
LPBOR
BORV
STVREN
PLLEN
bit 13
bit 8
U-1
R/P-1
U-1
R/P-1
—
VCAPEN
—
—WRT<1:0>
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared
‘1’ = Bit is set
-n = Value when blank or after Bulk Erase
bit 13
LVP: Low-Voltage Programming Enable bit(1)
1 = Low-voltage programming enabled
0 = High-voltage on MCLR must be used for programming
bit 12
DEBUG: In-Circuit Debugger Mode bit(3)
1 = In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins
0 = In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
bit 11
LPBOR: Low-Power BOR Enable bit
1 = Low-Power Brown-out Reset is disabled
0 = Low-Power Brown-out Reset is enabled
bit 10
BORV: Brown-out Reset Voltage Selection bit(4)
1 = Brown-out Reset voltage (Vbor), low trip point selected.
0 = Brown-out Reset voltage (Vbor), high trip point selected.
bit 9
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Stack Overflow or Underflow will cause a Reset
0 = Stack Overflow or Underflow will not cause a Reset
bit 8
PLLEN: PLL Enable bit
1 = 4xPLL enabled
0 = 4xPLL disabled
bit 7-6
Unimplemented: Read as ‘1’
bit 5
VCAPEN: Voltage Regulator Capacitor Enable bit(2)
1 = VCAP functionality is disabled on RA6
0 = VCAP functionality is enabled on RA6
bit 4-2
Unimplemented: Read as ‘1’
bit 1-0
WRT<1:0>: Flash Memory Self-Write Protection bits
4 kW Flash memory (PIC16(L)F1782 only):
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to 7FFh may be modified by EECON control
01 = 000h to 3FFh write-protected, 400h to 7FFh may be modified by EECON control
00 = 000h to 7FFh write-protected, no addresses may be modified by EECON control
8 kW Flash memory (PIC16(L)F1783 only):
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to FFFh may be modified by EECON control
01 = 000h to 7FFh write-protected, 800h to FFFh may be modified by EECON control
00 = 000h to FFFh write-protected, no addresses may be modified by EECON control
Note 1:
The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.
2:
Not implemented on PIC16LF1782/3.
3:
The DEBUG bit in Configuration Words is managed automatically by device development tools including debuggers
and programmers. For normal device operation, this bit should be maintained as a '1'.
4:
See Vbor parameter for specific trip point voltages.
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