參數(shù)資料
型號(hào): KSZ8863FLLI
廠商: Micrel Inc
文件頁(yè)數(shù): 78/106頁(yè)
文件大?。?/td> 0K
描述: IC ETHERNET SWITCH 3PORT 48-LQFP
標(biāo)準(zhǔn)包裝: 250
控制器類型: 以太網(wǎng)開(kāi)關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 托盤
配用: 576-3866-ND - BOARD EVALUATION FOR KSZ8863FLL
其它名稱: 576-3750
PIC16C72 Series
DS39016A-page 72
Preliminary
1998 Microchip Technology Inc.
FIGURE 10-14: WAKE-UP FROM SLEEP THROUGH INTERRUPT
10.14
Program Verication/Code Protection
If the code protection bit(s) have not been pro-
grammed, the on-chip program memory can be read
out for verication purposes.
10.15
ID Locations
Four memory locations (2000h - 2003h) are designated
as ID locations where the user can store checksum or
other code-identication numbers. These locations are
not accessible during normal execution but are read-
able and writable during program/verify. It is recom-
mended that only the 4 least signicant bits of the ID
location are used.
For ROM devices, these values are submitted along
with the ROM code.
10.16
In-Circuit Serial Programming
PIC16CXXX family microcontrollers can be serially
programmed while in the end application circuit. This is
simply done with two lines for clock and data, and three
other lines for power, ground, and the programming
voltage. This allows customers to manufacture boards
with unprogrammed devices, and then program the
microcontroller just before shipping the product. This
also allows the most recent rmware or a custom rm-
ware to be programmed.
For complete details of serial programming, please
refer to the In-Circuit Serial Programming (ICSP)
Guide, DS30277.
Q1
Q2
Q3 Q4
Q1 Q2
Q3
Q4
Q1
Q2 Q3 Q4
Q1 Q2 Q3 Q4
Q1
Q2 Q3
Q4
Q1 Q2
Q3
Q4
OSC1
CLKOUT(4)
INT pin
INTF ag
(INTCON<1>)
GIE bit
(INTCON<7>)
INSTRUCTION FLOW
PC
Instruction
fetched
Instruction
executed
PC
PC+1
PC+2
Inst(PC) = SLEEP
Inst(PC - 1)
Inst(PC + 1)
SLEEP
Processor in
SLEEP
Interrupt Latency
(Note 2)
Inst(PC + 2)
Inst(PC + 1)
Inst(0004h)
Inst(0005h)
Inst(0004h)
Dummy cycle
PC + 2
0004h
0005h
Dummy cycle
TOST(2)
PC+2
Note
1:
XT, HS or LP oscillator mode assumed.
2:
TOST = 1024TOSC (drawing not to scale) This delay will not be there for RC osc mode.
3:
GIE = '1' assumed. In this case after wake- up, the processor jumps to the interrupt routine. If GIE = '0', execution will continue in-line.
4:
CLKOUT is not available in these osc modes, but shown here for timing reference.
Note:
Microchip does not recommend code pro-
tecting windowed devices.
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