The A/D conversio" />
參數(shù)資料
型號： KSZ8863FLLI
廠商： Micrel Inc
文件頁數(shù)： 61/106頁
文件大?。?/td> 0K
描述： IC ETHERNET SWITCH 3PORT 48-LQFP
標準包裝： 250
控制器類型： 以太網(wǎng)開關(guān)控制器
接口： MII
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
配用： 576-3866-ND - BOARD EVALUATION FOR KSZ8863FLL
其它名稱： 576-3750
PIC16C72 Series
1998 Microchip Technology Inc.
Preliminary
DS39016A-page 57
9.2
Selecting the A/D Conversion Clock
The A/D conversion time per bit is dened as TAD. The
A/D conversion requires 9.5TAD per 8-bit conversion.
The source of the A/D conversion clock is software
selectable. The four possible options for TAD are:
2TOSC
8TOSC
32TOSC
Internal RC oscillator
For correct A/D conversions, the A/D conversion clock
(TAD) must be selected to ensure a minimum TAD time
of 1.6
s.
Table 9-1 shows the resultant TAD times derived from
the device operating frequencies and the A/D clock
source selected.
9.3
Configuring Analog Port Pins
The ADCON1, TRISA, and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bits set (input). If the TRIS bit is cleared (out-
put), the digital output level (VOH or VOL) will be
converted.
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
TABLE 9-1
TAD vs. DEVICE OPERATING FREQUENCIES
Note 1: When reading the port register, all pins
congured as analog input channels will
read as cleared (a low level). Pins cong-
ured as digital inputs, will convert an ana-
log input. Analog levels on a digitally
congured input will not affect the conver-
sion accuracy.
Note 2: Analog levels on any pin that is dened as
a digital input (including the AN4:AN0
pins), may cause the input buffer to con-
sume current that is out of the devices
specication.
AD Clock Source (TAD)
Device Frequency
Operation
ADCS1:ADCS0
20 MHz
5 MHz
1.25 MHz
333.33 kHz
2TOSC
00
100 ns(2)
400 ns(2)
1.6
s
6
s
8TOSC
01
400 ns(2)
1.6
s
6.4
s
24
s(3)
32TOSC
10
1.6
s
6.4
s
25.6
s(3)
96
s(3)
RC(5)
11
2 - 6
s(1,4)
2 - 6
s(1,4)
2 - 6
s(1,4)
2 - 6
s(1)
Legend: Shaded cells are outside of recommended range.
Note 1: The RC source has a typical TAD time of 4
s.
2: These values violate the minimum required TAD time.
3: For faster conversion times, the selection of another clock source is recommended.
4: When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for
sleep operation only.
5: For extended voltage devices (LC), please refer to Electrical Specications section.
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