參數(shù)資料
型號(hào)： KSZ8842-PMBL AM TR
廠商： Micrel Inc
文件頁(yè)數(shù)： 51/119頁(yè)
文件大小： 0K
描述： IC ETHERNET SW 2PORT 100LFBGA
標(biāo)準(zhǔn)包裝： 1,000
控制器類型： 以太網(wǎng)開關(guān)控制器
接口： PCI
電源電壓： 3.1 V ~ 3.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LFBGA
供應(yīng)商設(shè)備封裝： 100-LFBGA
包裝： 帶卷 (TR)
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Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
37
M9999-100207-1.5
The following table shows the RDES1 register bit fields.
Bit
Description
31 – 26
Reserved
25
RER Receive End of Ring
When set, indicates that the descriptor list reached its final descriptor. The KSZ8842-
PMQL/PMBL returns to the base address of the list, thus creating a descriptor ring.
24 – 11
Reserved
10 – 0
RBS Receive Buffer Size
Indicates the size, in bytes, of the receive data buffer. If the field is 0, the KSZ8842-
PMQL/PMBL ignores this buffer and moves to the next descriptor.
The buffer size must be a multiple of 4.
The following table shows the RDES2 register bit fields.
Bit
Description
31 – 0
Buffer Address
Indicates the physical memory address of the buffer.
The buffer address must be Word aligned.
The following table shows the RDES3 register bit fields.
Bit
Description
31 – 0
Next Descriptor Address
Indicates the physical memory address of the next descriptor in the descriptor ring.
The buffer address must be Word aligned.
Transmit Descriptors (TDES0-TDES3)
Transmit descriptors must be Word aligned. Each descriptor provides one frame buffer, one byte count field, and
control and status bits.
The following table shows the TDES0 register bit fields.
Bit
Description
31
OWN Own Bit
When set, indicates that the descriptor is owned by the KSZ8842-PMQL/PMBL. When
cleared, indicates that the descriptor is owned by the host. The KSZ8842-PMQL/PMBL
clears this bit either when it completes the frame transmission or when the buffer allocated in
the descriptor is empty.
The ownership bit of the first descriptor of the frame should be set after all subsequent
descriptors belonging to the same frame have been set. This avoids a possible race
condition between the KSZ8842-PMQL/PMBL fetching a descriptor and the driver setting an
ownership bit.
30 – 0
Reserved
The following table shows the TDES1 register bit fields.
Bit
Description
31
IC Interrupt on Completion
When set, the KSZ8842-PMQL/PMBL sets transmit interrupt after the present frame has
been transmitted. It is valid only when last segment is set.
30
FS First Segment
When set, indicates that the buffer contains the first segment of a frame.
29
LS Last Segment
When set, indicates that the buffer contains the last segment of a frame.
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PDF描述
KSZ8842-PMQLI IC ETHERNET SW 2PORT PCI 128PQFP
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8842-PMBL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 2+1 Port 10/100 Ethernet Switch with 32b/33MHz PCI Interface (BGA Version) Eval Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8842-PMBL-TR 功能描述:Ethernet Switch 10/100 Base-T/TX PHY PCI Interface 100-LFBGA (9x9) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):停產(chǎn) 協(xié)議:以太網(wǎng) 功能:開關(guān) 接口:PCI 標(biāo)準(zhǔn):10/100 Base-T/TX PHY 電壓 - 電源:3.1 V ~ 3.5 V 電流 - 電源:122mA 工作溫度:-40°C ~ 85°C 封裝/外殼:100-LFBGA 供應(yīng)商器件封裝:100-LFBGA（9x9） 標(biāo)準(zhǔn)包裝:1
KSZ8842-PMQL 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI bus interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8842-PMQL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 KSZ8842-PMQL Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8842-PMQLI 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI bus interface, Ind Temp (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
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