參數(shù)資料
型號(hào): KSZ8692XPB
廠商: Micrel Inc
文件頁數(shù): 11/42頁
文件大?。?/td> 0K
描述: IC ARM9 PHY 10/100MBPS 400-PBGA
標(biāo)準(zhǔn)包裝: 40
系列: KSZx692
應(yīng)用: 網(wǎng)絡(luò)和通信
核心處理器: ARM9
程序存儲(chǔ)器類型: 外部程序存儲(chǔ)器
控制器系列: KSZ
接口: EBI/EMI,以太網(wǎng),I²C,I²S,PCI,SPI,UART/USART,USB
輸入/輸出數(shù): 20
電源電壓: 1.235 V ~ 1.365 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 400-BGA
包裝: 托盤
供應(yīng)商設(shè)備封裝: 400-PBGA(24x24)
產(chǎn)品目錄頁面: 1080 (CN2011-ZH PDF)
其它名稱: 576-3537
Micrel, Inc.
KSZ8692MPB/KSZ8692XPB
March 2010
19
M9999-031810-4.0
pre-programmed by the policy owner or other software with information on how to identify wake frames from other network
traffic.
A wake-up event is a request for hardware and/or software external to the network device to put the system into a
powered state.
A wake-up signal is caused by:
1. Detection of a change in the network link state
2. Receipt of a network wake-up frame
3. Receipt of a Magic Packet
There are also other types of wake-up events that are not listed here as manufacturers may choose to implement these in
their own way.
Link Change
Link status wake events are useful to indicate a change in the network’s availability, especially when this change may
impact the level at which the system should re-enter the sleeping state. For example, a change from link off to link on may
trigger the system to re-enter sleep at a higher level (D2 versus D3
1) so that wake frames can be detected. Conversely, a
transition from link on to link off may trigger the system to re-enter sleep at a deeper level (D3 versus D2) since the
network is not currently available.
Wake-up Packet
Wake-up packets are certain types of packets with specific CRC values that a system recognizes to as a ‘wake up’ frame.
The KSZ8692MPB/KSZ8692XPB supports up to four user defined wake-up frames on each network controller port:
Magic Packet
Magic Packet technology is used to remotely wake up a sleeping or powered off PC or device on network. This is
accomplished by sending a specific packet of information, called a Magic Packet frame, to a node on the network. When a
PC or device capable of receiving the specific frame goes to sleep, it enables the Magic Packet RX mode in the
networkcontroller, and when the networkcontroller receives a Magic Packet frame, it will alerts the system to wake up.
Magic Packet is a standard feature integrated into the KSZ8692MPB/KSZ8692XPB. The controller implements multiple
advanced power-down modes including Magic Packet to conserve power and operate more efficiently.
Once the KSZ8692MPB/KSZ8692XPB has been put into Magic Packet Enable mode, it scans all incoming frames
addressed to the node for a specific data sequence, which indicates to the controller this is a Magic Packet (MP) frame.
A Magic Packet frame must also meet the basic requirements for the networktechnology chosen, such as Source Address
(SA), or Destination Address (DA), which may be the receiving station’s IEEE address or a multicast or broadcast address
and CRC.
The specific sequence consists of 16 duplications of the IEEE address of this node, with no breaks or interruptions. This
sequence can be located anywhere within the packet, but must be preceded by a synchronization stream. The
synchronization stream allows the scanning state machine to be much simpler. The synchronization stream is defined as
6 bytes of XoffFFh. The device will also accept a broadcast frame, as long as the 16 duplications of the IEEE address
match the address of the machine to be awakened.
Example:
If the IEEE address for a particular node on a network is 11h 22h, 33h, 44h, 55h, 66h, the networkcontroller would be
scanning for the data sequence (assuming an Ethernet frame):
DESTINATION SOURCE – MISC - .: FF FF FF FF FF FF - 11 22 33 44 55 66 - 11 22 33 44 55 66 - 11 22 33 44 55 66 -
11 22 33 44 55 66 - 11 22 33 44 55 66 - 11 22 33 44 55 66 - 11 22 33 44 55 66 - 11 22 33 44 55 66 - 11 22 33 44 55 66 -
11 22 33 44 55 66 - MISC - CIRC.
There are no further restrictions on a Magic Packet frame. For instance, the sequence could be in a TCP/IP packet or an
IPX packet. The frame may be bridged or routed across the network without affecting its ability to wake-up a node at the
1 References to D0, D1, D2, and D3 are power management states defined in a similar fashion to the way they are defined for PCI. For
more information, refer to the PCI specification at www.pcisig.com/specifications/conventional/pcipm1.2.pdf.
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