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參數(shù)資料
| 型號： | KMM5362203C2W |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh, 5V |
| 中文描述： | 200萬× 36的DRAM使用1Mx16上海藥物研究所和中國科學(xué)院1Mx4四，每1000刷新，5V的 |
| 文件頁數(shù)： | 3/17頁 |
| 文件大?。?/td> | 284K |
| 代理商： | KMM5362203C2W |
DRAM MODULE
KMM5362203C2W/C2WG
Rev. 0.0 (Nov. 1997)
- 3 -
KMM5362203C2W/C2WG with Fast Page Mode
2M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh, 5V
The Samsung KMM5362203C2W is a 2Mx36bits Dynamic
RAM high density memory module. The Samsung
KMM5362203C2W consists of four CMOS 1Mx16bits DRAMs
in 42-pin SOJ package mounted and two CMOS 1Mx4bit
Quad CAS DRAM in 24-pin SOJ package on a 72-pin glass-
epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is
mounted on the printed circuit board for each DRAM. The
KMM5362203C2W is a Single In-line Memory Module with
edge connections and is intended for mounting into 72 pin
edge connector sockets.
PERFORMANCE RANGE
Part Identification
- KMM5362203C2W(1024 cycles/16ms Ref, SOJ, Solder)
- KMM5362203C2WG(1024 cycles/16ms Ref, SOJ, Gold)
Fast Page Mode Operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
TTL compatible inputs and outputs
Single +5V
±
10% power supply
JEDEC standard PDPin & pinout
PCB : Height(750mil), double sided component
GENERAL DESCRIPTION
FEATURES
Speed
t
RAC
t
CAC
t
RC
-5
50ns
15ns
90ns
-6
60ns
15ns
110ns
PIN NAMES
Pin Name
Function
A0 - A9
Address Inputs
DQ0 - DQ35
Data In/Out
W
Read/Write Enable
RAS0 , RAS1
Row Address Strobe
CAS0 - CAS3
Column Address Strobe
PD1 -PD4
Presence Detect
Vcc
Power(+5V)
Vss
Ground
NC
No Connection
Res
Reserved Pin
PRESENCE DETECT PINS (Optional)
* Pin connection changing available
Pin
50NS
60NS
PD1
PD2
PD3
PD4
NC
NC
Vss
Vss
NC
NC
NC
NC
PIN CONFIGURATIONS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Symbol
V
SS
DQ0
DQ18
DQ1
DQ19
DQ2
DQ20
DQ3
DQ21
Vcc
NC
A0
A1
A2
A3
A4
A5
A6
Res(A10)
DQ4
DQ22
DQ5
DQ23
DQ6
DQ24
DQ7
DQ25
A7
Res(A11)
Vcc
A8
A9
RAS1
RAS0
DQ26
DQ8
Pin
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Symbol
DQ17
DQ35
Vss
CAS0
CAS2
CAS3
CAS1
RAS0
RAS1
NC
W
NC
DQ9
DQ27
DQ10
DQ28
DQ11
DQ29
DQ12
DQ30
DQ13
DQ31
Vcc
DQ32
DQ14
DQ33
DQ15
DQ34
DQ16
NC
PD1
PD2
PD3
PD4
NC
Vss
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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| KMM5362203C2WG | 2M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh, 5V |
| KMM5362205C2W | 2M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM5362205C2WG | 2M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM5364005BSW | 4M x 36 DRAM SIMM(4M x 36 動態(tài) RAM模塊) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KMM5362203C2WG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh, 5V |
| KMM5362205C2W | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM5362205C2WG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM53632000BK | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
| KMM53632000BKG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 36 DRAM SIMM Using 16Mx4 & 16Mx1, 4K Refresh, 5V |
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